Cobra USB 2.0 PS3 Boot Traffic Scanned, TDC File Available

Category: PS3 Hacks & JailBreak  By: PS3 News - (psx-scene.com)
Tags: cobra usb 2.0 ps3 cobra usb ps3 boot traffic cobra usb ps3 scanned cobra usb ps3 tdc file

98w ago - Following up on his previous work, today Hansi has scanned the Cobra USB 2.0 USB traffic with his Beagle USB 480 Protocol Analyzer v1.00 and shared the resulting dump in total phase data center format.

Download: Cobra USB 2.0 Boot Scan TDC File / Cobra USB 2.0 Boot Scan TDC File (Mirror) / PSGrooPIC Cobra v2.00

To quote: Cobra USB dongle arrived today, thank you VERY much goes to span who donated a dongle to me! (let me know if you need it back, or I'll keep it if there is a need to scan again if there is any updates)

We upgraded the Cobra to v2.0 and booted a 3.41 phat PS3 with the Beagle 480 USB protocol analyzer attached between the Cobra and the PS3. The resulting data file is attached.

I hope the developers in the community have some use for this. Cobra usb dongle med PS1 support!!

Also, from an0nym0us on IRC today: payload_groove_cobrav2.o and some ASM:

[an0nym0us] sure the payload .bin file is there
[an0nym0us] http://pastie.org/private/7q0c2ewddqdqo2icsntq
[an0nym0us] daxgr: http://pastie.org/private/iy4g8obpfiw1oaq6rbil7a here you go ...
[an0nym0us] good luck

Cobra 2.0 exit from ps2 game+boot of ps2 game at 185632.rar: http://www.multiupload.com/J4CTBWSEL0

Shortly following, Noltari has released a PSGrooPIC compile of the code. To quote:

Here's my compilation for PSGrooPIC. I haven't tested it because my PS3 is on FW 3.66 (online FTW). Remember that according to Cobra you must be on 3.41 official and you mustn't remove the dongle.

http://dl.dropbox.com/u/4708147/PSGrooPIC/builds/Cobra/PSGrooPIC_Cobra_v2.00.zip

P.S: It may not work! Cheers! 


payload_groove_cobrav2.o

##payload_groove_cobrav2.o 

payload_groove_cobrav2.o:     file format elf64-powerpc


Disassembly of section raw:

0000000000000000 <raw>:
   0:	09 02 12 00 	tdgti   r2,4608
   4:	01 00 00 80 	.long 0x1000080
   8:	fa 09 04 00 	std     r16,1024(r9)
   c:	00 00 fe 01 	.long 0xfe01
  10:	02 00 00 00 	.long 0x2000000
  14:	00 00 00 00 	.long 0x0
  18:	fa ce b0 03 	.long 0xfaceb003
  1c:	aa bb cc dd 	lha     r21,-13091(r27)

  20:	7c 08 02 a6 	mflr    r0
  24:	48 00 00 05 	bl      0x28			(0x4)

  28:	7c 88 02 a6 	mflr    r4
  2c:	38 84 ff f8 	addi    r4,r4,-8
  30:	38 60 00 01 	li      r3,1
  34:	78 63 f8 06 	rldicr  r3,r3,63,0
  38:	64 65 00 7f 	oris    r5,r3,127
  3c:	60 a5 f0 00 	ori     r5,r5,61440
  40:	64 66 00 7f 	oris    r6,r3,127
  44:	60 c6 fe 38 	ori     r6,r6,65080
  48:	e9 04 00 00 	ld      r8,0(r4)
  4c:	f9 05 00 00 	std     r8,0(r5)
  50:	e9 04 00 08 	ld      r8,8(r4)
  54:	f9 05 00 08 	std     r8,8(r5)
  58:	e9 04 00 10 	ld      r8,16(r4)
  5c:	f9 05 00 10 	std     r8,16(r5)
  60:	e9 04 00 18 	ld      r8,24(r4)
  64:	f9 05 00 18 	std     r8,24(r5)
  68:	7c 00 28 6c 	dcbst   r0,r5
  6c:	7c 00 04 ac 	sync    
  70:	7c 00 2f ac 	icbi    r0,r5
  74:	38 84 00 20 	addi    r4,r4,32
  78:	38 a5 00 20 	addi    r5,r5,32
  7c:	7c 25 30 40 	cmpld   r5,r6
  80:	41 80 ff c8 	blt+    0x48			(0xFFFFFFC8)
  84:	64 64 00 7f 	oris    r4,r3,127
  88:	60 84 f0 74 	ori     r4,r4,61556
  8c:	7c 89 03 a6 	mtctr   r4
  90:	4e 80 04 20 	bctr
  94:	f8 01 00 10 	std     r0,16(r1)
  98:	f8 21 ff 81 	stdu    r1,-128(r1)
  9c:	f8 41 00 28 	std     r2,40(r1)
  a0:	78 42 07 c4 	rldicr  r2,r2,0,31
  a4:	64 42 00 80 	oris    r2,r2,128
  a8:	60 42 7c 20 	ori     r2,r2,31776
  ac:	48 00 05 15 	bl      0x5c0			(0x514)
  b0:	e8 41 00 28 	ld      r2,40(r1)
  b4:	38 21 00 80 	addi    r1,r1,128
  b8:	e8 01 00 10 	ld      r0,16(r1)
  bc:	7c 08 03 a6 	mtlr    r0
  c0:	38 60 00 00 	li      r3,0
  c4:	4e 80 00 20 	blr

	...

  e0:	7c 08 02 a6 	mflr    r0
  e4:	f8 01 00 20 	std     r0,32(r1)
  e8:	f8 41 00 28 	std     r2,40(r1)
  ec:	78 42 07 c4 	rldicr  r2,r2,0,31
  f0:	64 42 00 80 	oris    r2,r2,128
  f4:	60 42 7c 20 	ori     r2,r2,31776
  f8:	48 00 06 e9 	bl      0x7e0			(0x6e8)
  fc:	e8 41 00 28 	ld      r2,40(r1)
 100:	e8 01 00 20 	ld      r0,32(r1)
 104:	7c 08 03 a6 	mtlr    r0
 108:	4e 80 00 20 	blr

 10c:	60 00 00 00 	nop

 110:	7c 08 02 a6 	mflr    r0
 114:	f8 01 00 20 	std     r0,32(r1)
 118:	f8 41 00 28 	std     r2,40(r1)
 11c:	78 42 07 c4 	rldicr  r2,r2,0,31
 120:	64 42 00 80 	oris    r2,r2,128
 124:	60 42 7c 20 	ori     r2,r2,31776
 128:	48 00 08 0d 	bl      0x934			(0x80c)
 12c:	e8 41 00 28 	ld      r2,40(r1)
 130:	e8 01 00 20 	ld      r0,32(r1)
 134:	7c 08 03 a6 	mtlr    r0
 138:	4e 80 00 20 	blr

 13c:	60 00 00 00 	nop

 140:	7c 08 02 a6 	mflr    r0
 144:	f8 01 00 20 	std     r0,32(r1)
 148:	f8 41 00 28 	std     r2,40(r1)
 14c:	78 42 07 c4 	rldicr  r2,r2,0,31
 150:	64 42 00 80 	oris    r2,r2,128
 154:	60 42 7c 20 	ori     r2,r2,31776
 158:	48 00 08 55 	bl      0x9ac			(0x854)
 15c:	e8 41 00 28 	ld      r2,40(r1)
 160:	e8 01 00 20 	ld      r0,32(r1)
 164:	7c 08 03 a6 	mtlr    r0
 168:	4e 80 00 20 	blr

 16c:	60 00 00 00 	nop

 170:	7c 08 02 a6 	mflr    r0
 174:	f8 01 00 20 	std     r0,32(r1)
 178:	f8 41 00 28 	std     r2,40(r1)
 17c:	48 00 00 05 	bl      0x180			(0x4)
 180:	38 00 00 00 	li      r0,0
 184:	38 40 00 00 	li      r2,0
 188:	64 42 00 80 	oris    r2,r2,128
 18c:	60 42 7c 20 	ori     r2,r2,31776
 190:	64 00 00 7f 	oris    r0,r0,127
 194:	60 00 f1 50 	ori     r0,r0,61776
 198:	7c 00 10 50 	subf    r0,r0,r2

 19c:	7c 48 02 a6 	mflr    r2
 1a0:	38 42 ff f0 	addi    r2,r2,-16
 1a4:	7c 42 02 14 	add     r2,r2,r0
 1a8:	48 00 04 bd 	bl      0x664			(0x4bc)
 1ac:	e8 41 00 28 	ld      r2,40(r1)
 1b0:	60 00 00 00 	nop
 1b4:	60 00 00 00 	nop
 1b8:	e8 01 00 20 	ld      r0,32(r1)
 1bc:	7c 08 03 a6 	mtlr    r0
 1c0:	4e 80 00 20 	blr

 1c4:	38 83 00 04 	addi    r4,r3,4
 1c8:	78 63 06 24 	rldicr  r3,r3,0,56
 1cc:	7c 23 20 40 	cmpld   r3,r4
 1d0:	40 80 00 1c 	bge-    0x1ec			(0x1c)
 1d4:	7c 00 18 6c 	dcbst   r0,r3
 1d8:	7c 00 04 ac 	sync    
 1dc:	7c 00 1f ac 	icbi    r0,r3
 1e0:	4c 00 01 2c 	isync
 1e4:	38 63 00 80 	addi    r3,r3,128
 1e8:	4b ff ff e4 	b       0x1cc			(0xffffffe4)
 1ec:	4e 80 00 20 	blr

 1f0:	80 00 00 00 	lwz     r0,0(0)
 1f4:	00 0d 22 d8 	.long 0xd22d8
 1f8:	80 00 00 00 	lwz     r0,0(0)
 1fc:	00 33 e7 20 	.long 0x33e720
 200:	80 00 00 00 	lwz     r0,0(0)
 204:	00 0d 29 98 	.long 0xd2998
 208:	80 00 00 00 	lwz     r0,0(0)
 20c:	00 33 e7 20 	.long 0x33e720
 210:	80 00 00 00 	lwz     r0,0(0)
 214:	00 0d 29 c4 	.long 0xd29c4
 218:	80 00 00 00 	lwz     r0,0(0)
 21c:	00 33 e7 20 	.long 0x33e720
 220:	80 00 00 00 	lwz     r0,0(0)
 224:	00 0d 29 2c 	.long 0xd292c
 228:	80 00 00 00 	lwz     r0,0(0)
 22c:	00 33 e7 20 	.long 0x33e720
 230:	80 00 00 00 	lwz     r0,0(0)
 234:	00 01 18 58 	.long 0x11858
 238:	80 00 00 00 	lwz     r0,0(0)
 23c:	00 33 e7 20 	.long 0x33e720
 240:	80 00 00 00 	lwz     r0,0(0)
 244:	00 01 18 50 	.long 0x11850
 248:	80 00 00 00 	lwz     r0,0(0)
 24c:	00 33 e7 20 	.long 0x33e720
 250:	80 00 00 00 	lwz     r0,0(0)
 254:	00 01 1d 38 	.long 0x11d38
 258:	80 00 00 00 	lwz     r0,0(0)
 25c:	00 33 e7 20 	.long 0x33e720
 260:	80 00 00 00 	lwz     r0,0(0)
 264:	00 01 1b 60 	.long 0x11b60
 268:	80 00 00 00 	lwz     r0,0(0)
 26c:	00 33 e7 20 	.long 0x33e720
 270:	80 00 00 00 	lwz     r0,0(0)
 274:	00 01 19 2c 	.long 0x1192c
 278:	80 00 00 00 	lwz     r0,0(0)
 27c:	00 33 e7 20 	.long 0x33e720
 280:	80 00 00 00 	lwz     r0,0(0)
 284:	00 06 20 88 	.long 0x62088
 288:	80 00 00 00 	lwz     r0,0(0)
 28c:	00 33 e7 20 	.long 0x33e720
 290:	80 00 00 00 	lwz     r0,0(0)
 294:	00 06 24 c8 	.long 0x624c8
 298:	80 00 00 00 	lwz     r0,0(0)
 29c:	00 33 e7 20 	.long 0x33e720
 2a0:	38 00 00 10 	li      r0,16
 2a4:	fb c1 ff f0 	std     r30,-16(r1)
 2a8:	38 63 00 0f 	addi    r3,r3,15
 2ac:	fb e1 ff f8 	std     r31,-8(r1)
 2b0:	7c 09 03 a6 	mtctr   r0
 2b4:	38 00 00 00 	li      r0,0
 2b8:	39 40 00 0f 	li      r10,15
 2bc:	39 01 ff d0 	addi    r8,r1,-48
 2c0:	90 01 ff dc 	stw     r0,-36(r1)
 2c4:	7d 49 16 70 	srawi   r9,r10,2
 2c8:	7d 29 01 94 	addze   r9,r9
 2cc:	7d 29 07 b4 	extsw   r9,r9
 2d0:	38 0a ff ff 	addi    r0,r10,-1
 2d4:	89 63 00 00 	lbz     r11,0(r3)
 2d8:	79 29 17 64 	rldicr  r9,r9,2,61
 2dc:	7c 0a 07 b4 	extsw   r10,r0
 2e0:	38 63 ff ff 	addi    r3,r3,-1
 2e4:	7c 09 40 2e 	lwzx    r0,r9,r8
 2e8:	54 00 40 2e 	rlwinm  r0,r0,8,0,23
 2ec:	7c 00 5a 14 	add     r0,r0,r11
 2f0:	7c 09 41 2e 	stwx    r0,r9,r8
 2f4:	42 00 ff d0 	bdnz+   0x2c4			(0xffffffd0)
 2f8:	e9 22 80 00 	ld      r9,-32768(r2)
 2fc:	3c 00 b7 e1 	lis     r0,-18463
 300:	39 60 00 2b 	li      r11,43
 304:	60 00 51 63 	ori     r0,r0,20835
 308:	39 40 00 00 	li      r10,0
 30c:	7d 69 03 a6 	mtctr   r11
 310:	e8 a9 00 00 	ld      r5,0(r9)
 314:	90 05 00 00 	stw     r0,0(r5)
 318:	7d 2a 28 2e 	lwzx    r9,r10,r5
 31c:	7d 65 52 14 	add     r11,r5,r10
 320:	39 4a 00 04 	addi    r10,r10,4
 324:	3d 29 9e 37 	addis   r9,r9,-25033
 328:	39 29 79 b9 	addi    r9,r9,31161
 32c:	91 2b 00 04 	stw     r9,4(r11)
 330:	42 00 ff e8 	bdnz+   0x318			(0xffffffe8)
 334:	38 00 00 84 	li      r0,132
 338:	38 e0 00 00 	li      r7,0
 33c:	39 80 00 00 	li      r12,0
 340:	7c 09 03 a6 	mtctr   r0
 344:	38 60 00 00 	li      r3,0
 348:	38 80 00 00 	li      r4,0
 34c:	3b e1 ff d0 	addi    r31,r1,-48
 350:	3b c0 00 2c 	li      r30,44
 354:	39 07 00 01 	addi    r8,r7,1
 358:	78 e7 17 64 	rldicr  r7,r7,2,61
 35c:	7d 64 1a 14 	add     r11,r4,r3
 360:	79 86 17 64 	rldicr  r6,r12,2,61
 364:	39 2c 00 01 	addi    r9,r12,1
 368:	7d 20 16 70 	srawi   r0,r9,2
 36c:	7c 00 01 94 	addze   r0,r0
 370:	54 00 10 3a 	rlwinm  r0,r0,2,0,29
 374:	7d 45 38 2e 	lwzx    r10,r5,r7
 378:	7d 20 48 50 	subf    r9,r0,r9
 37c:	7d 6b 52 14 	add     r11,r11,r10
 380:	7d 2c 07 b4 	extsw   r12,r9
 384:	55 6b 18 3e 	rotlwi  r11,r11,3
 388:	7d 48 f3 d6 	divw    r10,r8,r30
 38c:	79 63 00 20 	clrldi  r3,r11,32
 390:	1d 4a 00 2c 	mulli   r10,r10,44
 394:	7c 65 39 2e 	stwx    r3,r5,r7
 398:	7d 63 22 14 	add     r11,r3,r4
 39c:	7c 06 f8 2e 	lwzx    r0,r6,r31
 3a0:	7d 0a 40 50 	subf    r8,r10,r8
 3a4:	55 6b 06 fe 	clrlwi  r11,r11,27
 3a8:	7c 00 22 14 	add     r0,r0,r4
 3ac:	21 2b 00 20 	subfic  r9,r11,32
 3b0:	7c 00 1a 14 	add     r0,r0,r3
 3b4:	7d 07 07 b4 	extsw   r7,r8
 3b8:	78 00 00 20 	clrldi  r0,r0,32
 3bc:	7c 09 4c 30 	srw     r9,r0,r9
 3c0:	7c 00 58 30 	slw     r0,r0,r11
 3c4:	7c 00 4b 78 	or      r0,r0,r9
 3c8:	78 04 00 20 	clrldi  r4,r0,32
 3cc:	7c 86 f9 2e 	stwx    r4,r6,r31
 3d0:	42 00 ff 84 	bdnz+   0x354			(0xffffff84)
 3d4:	eb c1 ff f0 	ld      r30,-16(r1)
 3d8:	eb e1 ff f8 	ld      r31,-8(r1)
 3dc:	4e 80 00 20 	blr

	...

 3e8:	00 02 00 00 	.long 0x20000
 3ec:	e9 22 80 00 	ld      r9,-32768(r2)
 3f0:	38 00 00 14 	li      r0,20
 3f4:	81 43 00 00 	lwz     r10,0(r3)
 3f8:	7c 09 03 a6 	mtctr   r0
 3fc:	80 03 00 08 	lwz     r0,8(r3)
 400:	fb e1 ff f8 	std     r31,-8(r1)
 404:	7c 9f 23 78 	mr      r31,r4
 408:	80 e3 00 04 	lwz     r7,4(r3)
 40c:	e9 89 00 00 	ld      r12,0(r9)
 410:	80 83 00 0c 	lwz     r4,12(r3)
 414:	38 6c 00 a0 	addi    r3,r12,160
 418:	81 2c 00 ac 	lwz     r9,172(r12)
 41c:	81 6c 00 a8 	lwz     r11,168(r12)
 420:	7c 09 00 50 	subf    r0,r9,r0
 424:	7d 4b 50 50 	subf    r10,r11,r10
 428:	78 05 00 20 	clrldi  r5,r0,32
 42c:	79 46 00 20 	clrldi  r6,r10,32
 430:	54 c8 08 3c 	rlwinm  r8,r6,1,0,30
 434:	80 03 00 04 	lwz     r0,4(r3)
 438:	54 ab 08 3c 	rlwinm  r11,r5,1,0,30
 43c:	81 43 00 00 	lwz     r10,0(r3)
 440:	39 08 00 01 	addi    r8,r8,1
 444:	39 6b 00 01 	addi    r11,r11,1
 448:	7c 00 38 50 	subf    r0,r0,r7
 44c:	7d 6b 29 d6 	mullw   r11,r11,r5
 450:	78 00 00 20 	clrldi  r0,r0,32
 454:	55 6b 28 3e 	rotlwi  r11,r11,5
 458:	7d 4a 20 50 	subf    r10,r10,r4
 45c:	79 6b 00 20 	clrldi  r11,r11,32
 460:	79 4a 00 20 	clrldi  r10,r10,32
 464:	7c a4 2b 78 	mr      r4,r5
 468:	38 63 ff f8 	addi    r3,r3,-8
 46c:	7d 08 31 d6 	mullw   r8,r8,r6
 470:	55 08 28 3e 	rotlwi  r8,r8,5
 474:	79 08 00 20 	clrldi  r8,r8,32
 478:	55 09 06 fe 	clrlwi  r9,r8,27
 47c:	20 e9 00 20 	subfic  r7,r9,32
 480:	7c 09 4c 30 	srw     r9,r0,r9
 484:	7c 00 38 30 	slw     r0,r0,r7
 488:	7c c7 33 78 	mr      r7,r6
 48c:	7d 29 03 78 	or      r9,r9,r0
 490:	55 60 06 fe 	clrlwi  r0,r11,27
 494:	7d 29 5a 78 	xor     r9,r9,r11
 498:	21 60 00 20 	subfic  r11,r0,32
 49c:	7d 40 04 30 	srw     r0,r10,r0
 4a0:	7d 4a 58 30 	slw     r10,r10,r11
 4a4:	79 2b 00 20 	clrldi  r11,r9,32
 4a8:	7c 00 53 78 	or      r0,r0,r10
 4ac:	7d 65 5b 78 	mr      r5,r11
 4b0:	7c 00 42 78 	xor     r0,r0,r8
 4b4:	78 0a 00 20 	clrldi  r10,r0,32
 4b8:	7d 46 53 78 	mr      r6,r10
 4bc:	42 00 ff 74 	bdnz+   0x430			(0xffffff74)
 4c0:	81 2c 00 00 	lwz     r9,0(r12)
 4c4:	80 0c 00 04 	lwz     r0,4(r12)
 4c8:	7d 29 38 50 	subf    r9,r9,r7
 4cc:	91 5f 00 00 	stw     r10,0(r31)
 4d0:	7c 00 20 50 	subf    r0,r0,r4
 4d4:	91 7f 00 08 	stw     r11,8(r31)
 4d8:	91 3f 00 04 	stw     r9,4(r31)
 4dc:	90 1f 00 0c 	stw     r0,12(r31)
 4e0:	eb e1 ff f8 	ld      r31,-8(r1)
 4e4:	4e 80 00 20 	blr

	...

 4f0:	00 01 00 00 	.long 0x10000
 4f4:	f8 21 ff 61 	stdu    r1,-160(r1)

 4f8:	7c 08 02 a6 	mflr    r0
 4fc:	fb 81 00 80 	std     r28,128(r1)
 500:	7c 9c 23 78 	mr      r28,r4
 504:	fb a1 00 88 	std     r29,136(r1)
 508:	7c 7d 1b 78 	mr      r29,r3
 50c:	fb c1 00 90 	std     r30,144(r1)
 510:	3b c3 00 08 	addi    r30,r3,8
 514:	fb e1 00 98 	std     r31,152(r1)
 518:	7c 7f 1b 78 	mr      r31,r3
 51c:	f8 01 00 b0 	std     r0,176(r1)
 520:	48 00 00 4c 	b       0x56c			(0x4c)
 524:	4b ff fe c9 	bl      0x3ec			(0xfffffec8)
 528:	e9 42 80 08 	ld      r10,-32760(r2)
 52c:	e8 1f 00 00 	ld      r0,0(r31)
 530:	e9 2a 00 00 	ld      r9,0(r10)
 534:	f8 0a 00 00 	std     r0,0(r10)
 538:	e8 01 00 70 	ld      r0,112(r1)
 53c:	e9 6a 00 08 	ld      r11,8(r10)
 540:	7c 00 4a 78 	xor     r0,r0,r9
 544:	e9 21 00 78 	ld      r9,120(r1)
 548:	7d 29 5a 78 	xor     r9,r9,r11
 54c:	e9 7e 00 00 	ld      r11,0(r30)
 550:	f8 01 00 70 	std     r0,112(r1)
 554:	f9 6a 00 08 	std     r11,8(r10)
 558:	f8 1f 00 00 	std     r0,0(r31)
 55c:	3b ff 00 10 	addi    r31,r31,16
 560:	f9 3e 00 00 	std     r9,0(r30)
 564:	3b de 00 10 	addi    r30,r30,16
 568:	f9 21 00 78 	std     r9,120(r1)
 56c:	7c 1d f8 50 	subf    r0,r29,r31
 570:	7f e3 fb 78 	mr      r3,r31
 574:	7f 80 e0 00 	cmpw    cr7,r0,r28
 578:	38 81 00 70 	addi    r4,r1,112
 57c:	41 9c ff a8 	blt+    cr7,0x524		(0xffffffa8)
 580:	e8 01 00 b0 	ld      r0,176(r1)
 584:	eb 81 00 80 	ld      r28,128(r1)
 588:	eb a1 00 88 	ld      r29,136(r1)
 58c:	7c 08 03 a6 	mtlr    r0
 590:	eb c1 00 90 	ld      r30,144(r1)
 594:	eb e1 00 98 	ld      r31,152(r1)
 598:	38 21 00 a0 	addi    r1,r1,160
 59c:	4e 80 00 20 	blr

 5a0:	00 00 00 00 	.long 0x0
 5a4:	00 00 00 01 	.long 0x1
 5a8:	80 04 00 00 	lwz     r0,0(r4)
 5ac:	38 60 00 00 	li      r3,0
 5b0:	4e 80 00 20 	blr

	...

 5c0:	f8 21 ff 71 	stdu    r1,-144(r1)

 5c4:	7c 08 02 a6 	mflr    r0
 5c8:	fb 81 00 70 	std     r28,112(r1)
 5cc:	38 80 00 08 	li      r4,8
 5d0:	eb 82 80 10 	ld      r28,-32752(r2)
 5d4:	f8 01 00 a0 	std     r0,160(r1)
 5d8:	e9 22 80 20 	ld      r9,-32736(r2)
 5dc:	fb a1 00 78 	std     r29,120(r1)
 5e0:	eb a2 80 18 	ld      r29,-32744(r2)
 5e4:	e9 5c 00 00 	ld      r10,0(r28)
 5e8:	39 6a 00 40 	addi    r11,r10,64
 5ec:	7d 2b 48 50 	subf    r9,r11,r9
 5f0:	80 1d 00 00 	lwz     r0,0(r29)
 5f4:	7d 63 5b 78 	mr      r3,r11
 5f8:	39 29 ff fc 	addi    r9,r9,-4
 5fc:	90 0a 00 40 	stw     r0,64(r10)
 600:	55 29 01 ba 	rlwinm  r9,r9,0,6,29
 604:	65 29 48 00 	oris    r9,r9,18432
 608:	61 29 00 01 	ori     r9,r9,1
 60c:	91 2b 00 04 	stw     r9,4(r11)
 610:	4b ff fb b5 	bl      0x1c4			(0xfffffbb4)
 614:	60 00 00 00 	nop
 618:	e8 1c 00 00 	ld      r0,0(r28)
 61c:	e9 22 80 28 	ld      r9,-32728(r2)
 620:	7f a3 eb 78 	mr      r3,r29
 624:	38 80 00 04 	li      r4,4
 628:	7c 00 4a 14 	add     r0,r0,r9
 62c:	54 00 01 ba 	rlwinm  r0,r0,0,6,29
 630:	64 00 48 00 	oris    r0,r0,18432
 634:	90 1d 00 00 	stw     r0,0(r29)
 638:	4b ff fb 8d 	bl      0x1c4			(0xfffffb8c)
 63c:	60 00 00 00 	nop
 640:	e8 01 00 a0 	ld      r0,160(r1)
 644:	eb 81 00 70 	ld      r28,112(r1)
 648:	eb a1 00 78 	ld      r29,120(r1)
 64c:	7c 08 03 a6 	mtlr    r0
 650:	38 21 00 90 	addi    r1,r1,144
 654:	4e 80 00 20 	blr

 658:	00 00 00 00 	.long 0x0
 65c:	00 00 00 01 	.long 0x1
 660:	80 04 00 00 	lwz     r0,0(r4)
 664:	e9 22 80 38 	ld      r9,-32712(r2)

 668:	7c 08 02 a6 	mflr    r0
 66c:	f8 21 ff 41 	stdu    r1,-192(r1)
 670:	fb 81 00 a0 	std     r28,160(r1)
 674:	38 80 00 01 	li      r4,1
 678:	fb a1 00 a8 	std     r29,168(r1)
 67c:	f8 01 00 d0 	std     r0,208(r1)
 680:	f8 41 00 28 	std     r2,40(r1)
 684:	eb 82 80 30 	ld      r28,-32720(r2)
 688:	e8 09 00 00 	ld      r0,0(r9)
 68c:	e9 69 00 10 	ld      r11,16(r9)
 690:	7f 83 e3 78 	mr      r3,r28
 694:	7c 09 03 a6 	mtctr   r0
 698:	e8 49 00 08 	ld      r2,8(r9)
 69c:	4e 80 04 21 	bctrl
 6a0:	e8 41 00 28 	ld      r2,40(r1)
 6a4:	38 c0 00 01 	li      r6,1
 6a8:	e9 22 80 48 	ld      r9,-32696(r2)
 6ac:	38 a0 00 01 	li      r5,1
 6b0:	eb a2 80 40 	ld      r29,-32704(r2)
 6b4:	38 80 00 02 	li      r4,2
 6b8:	7f a3 eb 78 	mr      r3,r29
 6bc:	e8 09 00 00 	ld      r0,0(r9)
 6c0:	e9 69 00 10 	ld      r11,16(r9)
 6c4:	7c 09 03 a6 	mtctr   r0
 6c8:	e8 49 00 08 	ld      r2,8(r9)
 6cc:	4e 80 04 21 	bctrl
 6d0:	e8 41 00 28 	ld      r2,40(r1)
 6d4:	e8 9d 00 00 	ld      r4,0(r29)
 6d8:	e9 22 80 50 	ld      r9,-32688(r2)
 6dc:	e8 7c 00 00 	ld      r3,0(r28)
 6e0:	e8 09 00 00 	ld      r0,0(r9)
 6e4:	e9 69 00 10 	ld      r11,16(r9)
 6e8:	7c 09 03 a6 	mtctr   r0
 6ec:	e8 49 00 08 	ld      r2,8(r9)
 6f0:	4e 80 04 21 	bctrl
 6f4:	e8 41 00 28 	ld      r2,40(r1)
 6f8:	e9 22 80 60 	ld      r9,-32672(r2)
 6fc:	e8 62 80 58 	ld      r3,-32680(r2)
 700:	e8 09 00 00 	ld      r0,0(r9)
 704:	e9 69 00 10 	ld      r11,16(r9)
 708:	7c 09 03 a6 	mtctr   r0
 70c:	e8 49 00 08 	ld      r2,8(r9)
 710:	4e 80 04 21 	bctrl
 714:	e8 41 00 28 	ld      r2,40(r1)
 718:	38 a0 00 00 	li      r5,0
 71c:	e9 22 80 68 	ld      r9,-32664(r2)
 720:	38 81 00 80 	addi    r4,r1,128
 724:	e8 7d 00 00 	ld      r3,0(r29)
 728:	e8 09 00 00 	ld      r0,0(r9)
 72c:	e9 69 00 10 	ld      r11,16(r9)
 730:	7c 09 03 a6 	mtctr   r0
 734:	e8 49 00 08 	ld      r2,8(r9)
 738:	4e 80 04 21 	bctrl
 73c:	e8 41 00 28 	ld      r2,40(r1)
 740:	3c 00 f8 21 	lis     r0,-2015
 744:	e9 22 80 18 	ld      r9,-32744(r2)
 748:	38 80 00 04 	li      r4,4
 74c:	60 00 ff 11 	ori     r0,r0,65297
 750:	7d 23 4b 78 	mr      r3,r9
 754:	90 09 00 00 	stw     r0,0(r9)
 758:	4b ff fa 6d 	bl      0x1c4			(0xfffffa6c)
 75c:	60 00 00 00 	nop
 760:	eb a2 80 70 	ld      r29,-32656(r2)
 764:	e9 22 80 78 	ld      r9,-32648(r2)
 768:	e8 7d 00 00 	ld      r3,0(r29)
 76c:	80 89 00 00 	lwz     r4,0(r9)
 770:	4b ff fa 55 	bl      0x1c4			(0xfffffa54)
 774:	60 00 00 00 	nop
 778:	e8 1d 00 00 	ld      r0,0(r29)
 77c:	e9 61 00 80 	ld      r11,128(r1)
 780:	f8 41 00 28 	std     r2,40(r1)
 784:	7c 09 03 a6 	mtctr   r0
 788:	f8 01 00 70 	std     r0,112(r1)
 78c:	e8 41 00 78 	ld      r2,120(r1)
 790:	4e 80 04 21 	bctrl
 794:	e8 41 00 28 	ld      r2,40(r1)
 798:	e8 7d 00 00 	ld      r3,0(r29)
 79c:	e9 22 80 80 	ld      r9,-32640(r2)
 7a0:	38 80 00 27 	li      r4,39
 7a4:	e8 09 00 00 	ld      r0,0(r9)
 7a8:	e9 69 00 10 	ld      r11,16(r9)
 7ac:	7c 09 03 a6 	mtctr   r0
 7b0:	e8 49 00 08 	ld      r2,8(r9)
 7b4:	4e 80 04 21 	bctrl
 7b8:	e8 41 00 28 	ld      r2,40(r1)
 7bc:	e8 01 00 d0 	ld      r0,208(r1)
 7c0:	eb 81 00 a0 	ld      r28,160(r1)
 7c4:	eb a1 00 a8 	ld      r29,168(r1)
 7c8:	7c 08 03 a6 	mtlr    r0
 7cc:	38 21 00 c0 	addi    r1,r1,192
 7d0:	4e 80 00 20 	blr

 7d4:	00 00 00 00 	.long 0x0
 7d8:	00 00 00 01 	.long 0x1
 7dc:	80 04 00 00 	lwz     r0,0(r4)
 7e0:	e9 42 80 a0 	ld      r10,-32608(r2)

 7e4:	7c 08 02 a6 	mflr    r0
 7e8:	e9 62 80 90 	ld      r11,-32624(r2)
 7ec:	38 a0 00 00 	li      r5,0
 7f0:	e9 02 80 98 	ld      r8,-32616(r2)
 7f4:	38 c0 00 00 	li      r6,0
 7f8:	e9 22 80 88 	ld      r9,-32632(r2)
 7fc:	f8 21 ff 91 	stdu    r1,-112(r1)
 800:	f8 01 00 80 	std     r0,128(r1)
 804:	90 69 00 00 	stw     r3,0(r9)
 808:	90 8b 00 00 	stw     r4,0(r11)
 80c:	38 80 00 00 	li      r4,0
 810:	f8 41 00 28 	std     r2,40(r1)
 814:	e8 0a 00 00 	ld      r0,0(r10)
 818:	e8 68 00 00 	ld      r3,0(r8)
 81c:	7c 09 03 a6 	mtctr   r0
 820:	e9 6a 00 10 	ld      r11,16(r10)
 824:	e8 4a 00 08 	ld      r2,8(r10)
 828:	4e 80 04 21 	bctrl
 82c:	e8 41 00 28 	ld      r2,40(r1)
 830:	e8 01 00 80 	ld      r0,128(r1)
 834:	38 21 00 70 	addi    r1,r1,112
 838:	7c 08 03 a6 	mtlr    r0
 83c:	4e 80 00 20 	blr

 840:	00 00 00 00 	.long 0x0
 844:	00 00 00 01 	.long 0x1
 848:	80 00 00 00 	lwz     r0,0(0)
 84c:	e9 22 80 b8 	ld      r9,-32584(r2)

 850:	7c 08 02 a6 	mflr    r0
 854:	f8 21 ff 51 	stdu    r1,-176(r1)
 858:	f8 01 00 c0 	std     r0,192(r1)
 85c:	54 a0 84 3e 	rlwinm  r0,r5,16,16,31
 860:	e9 42 80 a8 	ld      r10,-32600(r2)
 864:	fb c1 00 a0 	std     r30,160(r1)
 868:	7c fe 3b 78 	mr      r30,r7
 86c:	fb e1 00 a8 	std     r31,168(r1)
 870:	98 61 00 70 	stb     r3,112(r1)
 874:	98 81 00 71 	stb     r4,113(r1)
 878:	38 81 00 70 	addi    r4,r1,112
 87c:	f8 41 00 28 	std     r2,40(r1)
 880:	b0 a1 00 74 	sth     r5,116(r1)
 884:	7c c5 33 78 	mr      r5,r6
 888:	b0 01 00 72 	sth     r0,114(r1)
 88c:	e9 69 00 10 	ld      r11,16(r9)
 890:	b0 e1 00 76 	sth     r7,118(r1)
 894:	38 e0 00 00 	li      r7,0
 898:	e8 09 00 00 	ld      r0,0(r9)
 89c:	e8 c2 80 b0 	ld      r6,-32592(r2)
 8a0:	e8 6a 00 02 	lwa     r3,0(r10)
 8a4:	7c 09 03 a6 	mtctr   r0
 8a8:	e8 49 00 08 	ld      r2,8(r9)
 8ac:	4e 80 04 21 	bctrl
 8b0:	e8 41 00 28 	ld      r2,40(r1)
 8b4:	38 81 00 78 	addi    r4,r1,120
 8b8:	7c 7f 1b 79 	mr.     r31,r3
 8bc:	38 a0 00 00 	li      r5,0
 8c0:	40 82 00 4c 	bne-    0x90c			(0x0000090c)
 8c4:	e9 22 80 68 	ld      r9,-32664(r2)
 8c8:	e9 42 80 c0 	ld      r10,-32576(r2)
 8cc:	e8 09 00 00 	ld      r0,0(r9)
 8d0:	e9 69 00 10 	ld      r11,16(r9)
 8d4:	7c 09 03 a6 	mtctr   r0
 8d8:	e8 49 00 08 	ld      r2,8(r9)
 8dc:	e8 6a 00 00 	ld      r3,0(r10)
 8e0:	4e 80 04 21 	bctrl
 8e4:	e8 41 00 28 	ld      r2,40(r1)
 8e8:	e9 22 80 88 	ld      r9,-32632(r2)
 8ec:	80 09 00 00 	lwz     r0,0(r9)
 8f0:	2f 80 00 00 	cmpwi   cr7,r0,0
 8f4:	40 9e 00 14 	bne-    cr7,0x908		(0x00000908)
 8f8:	e9 22 80 90 	ld      r9,-32624(r2)
 8fc:	80 09 00 00 	lwz     r0,0(r9)
 900:	7f 80 f0 00 	cmpw    cr7,r0,r30
 904:	41 9e 00 08 	beq-    cr7,0x90c		(0x0000090c)
 908:	3b e0 ff ff 	li      r31,-1
 90c:	e8 01 00 c0 	ld      r0,192(r1)
 910:	7f e3 fb 78 	mr      r3,r31
 914:	eb c1 00 a0 	ld      r30,160(r1)
 918:	eb e1 00 a8 	ld      r31,168(r1)
 91c:	7c 08 03 a6 	mtlr    r0
 920:	38 21 00 b0 	addi    r1,r1,176
 924:	4e 80 00 20 	blr

 928:	00 00 00 00 	.long 0x0
 92c:	00 00 00 01 	.long 0x1
 930:	80 02 00 00 	lwz     r0,0(r2)
 934:	e9 22 80 c8 	ld      r9,-32568(r2)

 938:	7c 08 02 a6 	mflr    r0
 93c:	f8 21 ff 91 	stdu    r1,-112(r1)
 940:	f8 01 00 80 	std     r0,128(r1)
 944:	38 80 00 00 	li      r4,0
 948:	f8 41 00 28 	std     r2,40(r1)
 94c:	38 a0 00 01 	li      r5,1
 950:	e8 09 00 00 	ld      r0,0(r9)
 954:	e9 69 00 10 	ld      r11,16(r9)
 958:	7c 09 03 a6 	mtctr   r0
 95c:	e8 49 00 08 	ld      r2,8(r9)
 960:	4e 80 04 21 	bctrl
 964:	e8 41 00 28 	ld      r2,40(r1)
 968:	3c 00 aa aa 	lis     r0,-21846
 96c:	81 23 00 08 	lwz     r9,8(r3)
 970:	60 00 ba c0 	ori     r0,r0,47808
 974:	7d 29 02 78 	xor     r9,r9,r0
 978:	7d 20 fe 70 	srawi   r0,r9,31
 97c:	7c 03 4a 78 	xor     r3,r0,r9
 980:	7c 63 00 50 	subf    r3,r3,r0
 984:	e8 01 00 80 	ld      r0,128(r1)
 988:	38 21 00 70 	addi    r1,r1,112
 98c:	54 63 0f fe 	rlwinm  r3,r3,1,31,31
 990:	7c 08 03 a6 	mtlr    r0
 994:	7c 63 07 b4 	extsw   r3,r3
 998:	7c 63 00 d0 	neg     r3,r3
 99c:	4e 80 00 20 	blr

 9a0:	00 00 00 00 	.long 0x0
 9a4:	00 00 00 01 	.long 0x1
 9a8:	80 00 00 00 	lwz     r0,0(0)
 9ac:	e9 22 80 d0 	ld      r9,-32560(r2)

 9b0:	7c 08 02 a6 	mflr    r0
 9b4:	f8 21 ff 61 	stdu    r1,-160(r1)
 9b8:	fb 81 00 80 	std     r28,128(r1)
 9bc:	38 80 00 00 	li      r4,0
 9c0:	fb a1 00 88 	std     r29,136(r1)
 9c4:	fb c1 00 90 	std     r30,144(r1)
 9c8:	fb e1 00 98 	std     r31,152(r1)
 9cc:	f8 01 00 b0 	std     r0,176(r1)
 9d0:	f8 41 00 28 	std     r2,40(r1)
 9d4:	e8 09 00 00 	ld      r0,0(r9)
 9d8:	e9 69 00 10 	ld      r11,16(r9)
 9dc:	7c 09 03 a6 	mtctr   r0
 9e0:	e8 49 00 08 	ld      r2,8(r9)
 9e4:	4e 80 04 21 	bctrl
 9e8:	e8 41 00 28 	ld      r2,40(r1)
 9ec:	38 80 00 01 	li      r4,1
 9f0:	e9 42 80 38 	ld      r10,-32712(r2)
 9f4:	e9 22 80 a8 	ld      r9,-32600(r2)
 9f8:	eb 82 80 98 	ld      r28,-32616(r2)
 9fc:	90 69 00 00 	stw     r3,0(r9)
 a00:	7f 83 e3 78 	mr      r3,r28
 a04:	e8 0a 00 00 	ld      r0,0(r10)
 a08:	e9 6a 00 10 	ld      r11,16(r10)
 a0c:	e8 4a 00 08 	ld      r2,8(r10)
 a10:	7c 09 03 a6 	mtctr   r0
 a14:	4e 80 04 21 	bctrl
 a18:	e8 41 00 28 	ld      r2,40(r1)
 a1c:	38 a0 00 01 	li      r5,1
 a20:	e9 22 80 48 	ld      r9,-32696(r2)
 a24:	38 c0 00 01 	li      r6,1
 a28:	eb a2 80 c0 	ld      r29,-32576(r2)
 a2c:	38 80 00 02 	li      r4,2
 a30:	7f a3 eb 78 	mr      r3,r29
 a34:	e8 09 00 00 	ld      r0,0(r9)
 a38:	e9 69 00 10 	ld      r11,16(r9)
 a3c:	7c 09 03 a6 	mtctr   r0
 a40:	e8 49 00 08 	ld      r2,8(r9)
 a44:	4e 80 04 21 	bctrl
 a48:	e8 41 00 28 	ld      r2,40(r1)
 a4c:	e8 9d 00 00 	ld      r4,0(r29)
 a50:	e9 22 80 50 	ld      r9,-32688(r2)
 a54:	e8 7c 00 00 	ld      r3,0(r28)
 a58:	e8 09 00 00 	ld      r0,0(r9)
 a5c:	e9 69 00 10 	ld      r11,16(r9)
 a60:	7c 09 03 a6 	mtctr   r0
 a64:	e8 49 00 08 	ld      r2,8(r9)
 a68:	4e 80 04 21 	bctrl
 a6c:	e8 41 00 28 	ld      r2,40(r1)
 a70:	3c a0 00 10 	lis     r5,16
 a74:	38 c1 00 70 	addi    r6,r1,112
 a78:	38 e0 00 08 	li      r7,8
 a7c:	38 80 00 11 	li      r4,17
 a80:	38 60 00 c0 	li      r3,192
 a84:	4b ff fd c9 	bl      0x84c			(0xfffffdc8)
 a88:	e9 42 80 d8 	ld      r10,-32552(r2)
 a8c:	e9 22 80 78 	ld      r9,-32648(r2)
 a90:	38 80 00 27 	li      r4,39
 a94:	80 61 00 74 	lwz     r3,116(r1)
 a98:	f8 41 00 28 	std     r2,40(r1)
 a9c:	90 69 00 00 	stw     r3,0(r9)
 aa0:	7c 63 07 b4 	extsw   r3,r3
 aa4:	e8 0a 00 00 	ld      r0,0(r10)
 aa8:	e9 6a 00 10 	ld      r11,16(r10)
 aac:	7c 09 03 a6 	mtctr   r0
 ab0:	e8 4a 00 08 	ld      r2,8(r10)
 ab4:	4e 80 04 21 	bctrl
 ab8:	e8 41 00 28 	ld      r2,40(r1)
 abc:	7c 7e 1b 78 	mr      r30,r3
 ac0:	e9 22 80 70 	ld      r9,-32656(r2)
 ac4:	e8 62 80 e0 	ld      r3,-32544(r2)
 ac8:	fb c9 00 00 	std     r30,0(r9)
 acc:	4b ff f7 d5 	bl      0x2a0			(0xfffff7d4)
 ad0:	38 a0 00 00 	li      r5,0
 ad4:	48 00 00 34 	b       0xb08			(0x34)
 ad8:	80 01 00 70 	lwz     r0,112(r1)
 adc:	3b a0 10 00 	li      r29,4096
 ae0:	7c 00 2a 14 	add     r0,r0,r5
 ae4:	40 99 00 08 	ble-    cr6,0xaec		(0x8)
 ae8:	79 3d 00 20 	clrldi  r29,r9,32
 aec:	78 05 00 20 	clrldi  r5,r0,32
 af0:	7b a7 04 20 	clrldi  r7,r29,48
 af4:	4b ff fd 59 	bl      0x84c			(0xfffffd58)
 af8:	7f e3 fb 78 	mr      r3,r31
 afc:	7f a4 07 b4 	extsw   r4,r29
 b00:	4b ff f9 f5 	bl      0x4f4			(0xfffff9f4)
 b04:	7f 85 e3 78 	mr      r5,r28
 b08:	e9 62 80 78 	ld      r11,-32648(r2)
 b0c:	39 25 10 00 	addi    r9,r5,4096
 b10:	7f fe 2a 14 	add     r31,r30,r5
 b14:	79 3c 00 20 	clrldi  r28,r9,32
 b18:	38 80 00 11 	li      r4,17
 b1c:	7f e6 fb 78 	mr      r6,r31
 b20:	80 0b 00 00 	lwz     r0,0(r11)
 b24:	38 60 00 c0 	li      r3,192
 b28:	7f 85 00 40 	cmplw   cr7,r5,r0
 b2c:	7f 1c 00 40 	cmplw   cr6,r28,r0
 b30:	7d 25 00 50 	subf    r9,r5,r0
 b34:	41 9c ff a4 	blt+    cr7,0xad8		(0xffffffa4)
 b38:	e9 22 80 a0 	ld      r9,-32608(r2)
 b3c:	38 80 00 00 	li      r4,0
 b40:	e9 42 80 30 	ld      r10,-32720(r2)
 b44:	38 a0 00 00 	li      r5,0
 b48:	f8 41 00 28 	std     r2,40(r1)
 b4c:	38 c0 00 00 	li      r6,0
 b50:	e8 09 00 00 	ld      r0,0(r9)
 b54:	e9 69 00 10 	ld      r11,16(r9)
 b58:	7c 09 03 a6 	mtctr   r0
 b5c:	e8 6a 00 00 	ld      r3,0(r10)
 b60:	e8 49 00 08 	ld      r2,8(r9)
 b64:	4e 80 04 21 	bctrl
 b68:	e8 41 00 28 	ld      r2,40(r1)
 b6c:	e8 01 00 b0 	ld      r0,176(r1)
 b70:	38 60 00 00 	li      r3,0
 b74:	eb 81 00 80 	ld      r28,128(r1)
 b78:	eb a1 00 88 	ld      r29,136(r1)
 b7c:	7c 08 03 a6 	mtlr    r0
 b80:	eb c1 00 90 	ld      r30,144(r1)
 b84:	eb e1 00 98 	ld      r31,152(r1)
 b88:	38 21 00 a0 	addi    r1,r1,160
 b8c:	4e 80 00 20 	blr

 b90:	00 00 00 00 	.long 0x0
 b94:	00 00 00 01 	.long 0x1
 b98:	80 04 00 00 	lwz     r0,0(r4)
	...
 ba8:	80 00 00 00 	lwz     r0,0(0)
 bac:	00 7f e0 00 	.long 0x7fe000
 bb0:	80 00 00 00 	lwz     r0,0(0)
 bb4:	00 7f fb 80 	.long 0x7ffb80
 bb8:	80 00 00 00 	lwz     r0,0(0)
 bbc:	00 7f fd 18 	.long 0x7ffd18
 bc0:	80 00 00 00 	lwz     r0,0(0)
 bc4:	00 7f fd 28 	.long 0x7ffd28
 bc8:	80 00 00 00 	lwz     r0,0(0)
 bcc:	00 7f fd 90 	.long 0x7ffd90
	...
 c40:	80 00 00 00 	lwz     r0,0(0)
 c44:	00 7f fb 88 	.long 0x7ffb88
 c48:	80 00 00 00 	lwz     r0,0(0)
 c4c:	00 7f fb b0 	.long 0x7ffbb0
 c50:	80 00 00 00 	lwz     r0,0(0)
 c54:	00 7f fd 38 	.long 0x7ffd38
 c58:	80 00 00 00 	lwz     r0,0(0)
 c5c:	00 28 7c 28 	.long 0x287c28
 c60:	80 00 00 00 	lwz     r0,0(0)
 c64:	00 28 7c 2c 	.long 0x287c2c
 c68:	7f ff ff ff 	.long 0x7fffffff
 c6c:	ff d7 83 d8 	.long 0xffd783d8
 c70:	80 00 00 00 	lwz     r0,0(0)
 c74:	00 7f fb d0 	.long 0x7ffbd0
 c78:	80 00 00 00 	lwz     r0,0(0)
 c7c:	00 7f f2 10 	.long 0x7ff210
 c80:	80 00 00 00 	lwz     r0,0(0)
 c84:	00 7f fb e0 	.long 0x7ffbe0
 c88:	80 00 00 00 	lwz     r0,0(0)
 c8c:	00 7f f2 40 	.long 0x7ff240
 c90:	80 00 00 00 	lwz     r0,0(0)
 c94:	00 7f f2 30 	.long 0x7ff230
 c98:	80 00 00 00 	lwz     r0,0(0)
 c9c:	00 7f fb 90 	.long 0x7ffb90
 ca0:	80 00 00 00 	lwz     r0,0(0)
 ca4:	00 7f f1 d0 	.long 0x7ff1d0
 ca8:	80 00 00 00 	lwz     r0,0(0)
 cac:	00 7f f2 50 	.long 0x7ff250
 cb0:	80 00 00 00 	lwz     r0,0(0)
 cb4:	00 7f fb f8 	.long 0x7ffbf8
 cb8:	80 00 00 00 	lwz     r0,0(0)
 cbc:	00 7f fb f0 	.long 0x7ffbf0
 cc0:	80 00 00 00 	lwz     r0,0(0)
 cc4:	00 7f f2 70 	.long 0x7ff270
 cc8:	80 00 00 00 	lwz     r0,0(0)
 ccc:	00 7f fb e8 	.long 0x7ffbe8
 cd0:	80 00 00 00 	lwz     r0,0(0)
 cd4:	00 7f fb ec 	.long 0x7ffbec
 cd8:	80 00 00 00 	lwz     r0,0(0)
 cdc:	00 7f fb c8 	.long 0x7ffbc8
 ce0:	80 00 00 00 	lwz     r0,0(0)
 ce4:	00 7f f2 20 	.long 0x7ff220
 ce8:	80 00 00 00 	lwz     r0,0(0)
 cec:	00 7f fb c0 	.long 0x7ffbc0
 cf0:	80 00 00 00 	lwz     r0,0(0)
 cf4:	00 7f fd 08 	.long 0x7ffd08
 cf8:	80 00 00 00 	lwz     r0,0(0)
 cfc:	00 7f f2 00 	.long 0x7ff200
 d00:	80 00 00 00 	lwz     r0,0(0)
 d04:	00 7f fb d8 	.long 0x7ffbd8
 d08:	80 00 00 00 	lwz     r0,0(0)
 d0c:	00 7f f1 e0 	.long 0x7ff1e0
 d10:	80 00 00 00 	lwz     r0,0(0)
 d14:	00 7f f1 f0 	.long 0x7ff1f0
 d18:	80 00 00 00 	lwz     r0,0(0)
 d1c:	00 7f f2 60 	.long 0x7ff260
 d20:	80 00 00 00 	lwz     r0,0(0)
 d24:	00 35 9b 05 	.long 0x359b05
 d28:	80 00 00 00 	lwz     r0,0(0)
 d2c:	00 7f f0 c0 	.long 0x7ff0c0
 d30:	80 00 00 00 	lwz     r0,0(0)
 d34:	00 80 7c 20 	.long 0x807c20
 d38:	80 00 00 00 	lwz     r0,0(0)
 d3c:	00 7f f0 f0 	.long 0x7ff0f0
 d40:	80 00 00 00 	lwz     r0,0(0)
 d44:	00 80 7c 20 	.long 0x807c20
 d48:	80 00 00 00 	lwz     r0,0(0)
 d4c:	00 7f f1 20 	.long 0x7ff120
 d50:	80 00 00 00 	lwz     r0,0(0)
 d54:	00 80 7c 20 	.long 0x807c20
 d58:	80 00 00 00 	lwz     r0,0(0)
 d5c:	00 7f f1 50 	.long 0x7ff150
 d60:	80 00 00 00 	lwz     r0,0(0)
 d64:	00 80 7c 20 	.long 0x807c20
 d68:	80 00 00 00 	lwz     r0,0(0)
 d6c:	00 7f f2 80 	.long 0x7ff280
 d70:	80 00 00 00 	lwz     r0,0(0)
 d74:	00 80 7c 20 	.long 0x807c20
	...
 d80:	80 00 00 00 	lwz     r0,0(0)
 d84:	00 7f f3 cc 	.long 0x7ff3cc
 d88:	80 00 00 00 	lwz     r0,0(0)
 d8c:	00 80 7c 20 	.long 0x807c20
	...
 d98:	80 00 00 00 	lwz     r0,0(0)
 d9c:	00 7f f4 d4 	.long 0x7ff4d4
 da0:	80 00 00 00 	lwz     r0,0(0)
 da4:	00 80 7c 20 	.long 0x807c20
	...
 db0:	80 00 00 00 	lwz     r0,0(0)
 db4:	00 7f f5 8c 	.long 0x7ff58c
 db8:	80 00 00 00 	lwz     r0,0(0)
 dbc:	00 80 7c 20 	.long 0x807c20
	...
 dc8:	80 00 00 00 	lwz     r0,0(0)
 dcc:	00 7f f5 a0 	.long 0x7ff5a0
 dd0:	80 00 00 00 	lwz     r0,0(0)
 dd4:	00 80 7c 20 	.long 0x807c20
	...
 de0:	80 00 00 00 	lwz     r0,0(0)
 de4:	00 7f f6 44 	.long 0x7ff644
 de8:	80 00 00 00 	lwz     r0,0(0)
 dec:	00 80 7c 20 	.long 0x807c20
	...
 df8:	80 00 00 00 	lwz     r0,0(0)
 dfc:	00 7f f7 c0 	.long 0x7ff7c0
 e00:	80 00 00 00 	lwz     r0,0(0)
 e04:	00 80 7c 20 	.long 0x807c20
	...
 e10:	80 00 00 00 	lwz     r0,0(0)
 e14:	00 7f f8 2c 	.long 0x7ff82c
 e18:	80 00 00 00 	lwz     r0,0(0)
 e1c:	00 80 7c 20 	.long 0x807c20
	...
 e28:	80 00 00 00 	lwz     r0,0(0)
 e2c:	00 7f f9 14 	.long 0x7ff914
 e30:	80 00 00 00 	lwz     r0,0(0)
 e34:	00 80 7c 20 	.long 0x807c20
	...
 e40:	80 00 00 00 	lwz     r0,0(0)
 e44:	00 7f f9 8c 	.long 0x7ff98c
 e48:	80 00 00 00 	lwz     r0,0(0)
 e4c:	00 80 7c 20 	.long 0x807c20
	...



#
# +-------------------------------------------------------------------------+
# |   This file	has been generated by The Interactive Disassembler (IDA)    |
# |	   Copyright (c) 2009 by Hex-Rays, <support@hex-rays.com>	    |
# +-------------------------------------------------------------------------+
#
# Input	MD5   :	BA19CAE789AA1657B4D889BCF7608137

# File Name   :	C:\payload_groove_cobrav2.o
# Format      :	ELF (Relocatable)
#
# Source File :	'payload_groove_cobrav2.c'

# Processor	  : PPC
# Target assembler: GNU	Assembler
# Byte sex	  : Big	endian

# Segment type:	Pure code
		.section "seg004"
unk_1000:	.byte	 9		# DATA XREF: seg004:0848 r seg004:09A8 r
		.byte	 2
		.byte 0x12
		.byte	 0
		.byte	 1
		.byte	 0
		.byte	 0
		.byte 0x80 # €
		.byte 0xFA # ú
		.byte	 9
		.byte	 4
		.byte	 0
		.byte	 0
		.byte	 0
		.byte 0xFE # �
		.byte	 1
		.byte	 2
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte 0xFACE
		.byte 0xB003
		.byte 0xAABB
		.byte 0xCCDD
# ---------------------------------------------------------------------------
		mfspr	%r0, LR		# Move from sprg,
		bl	loc_1028	# Branch

loc_1028:
		mfspr	%r4, LR		# Move from sprg,
		addi	%r4, %r4, -8	# Add Immediate
		li	%r3, 1		# Load Immediate
		rldicr	%r3, %r3, 63,0	# Rotate Left Double Word Immediate then Clear Right
		oris	%r5, %r3, 0x7F	# OR Immediate Shifted
		ori	%r5, %r5, -0x1000 # OR Immediate
		oris	%r6, %r3, 0x7F	# OR Immediate Shifted
		ori	%r6, %r6, -0x1C8 # OR Immediate

loc_1048:				# CODE XREF: seg004:0080 j
		ld	%r8, 0(%r4)	# Load Double Word
		std	%r8, 0(%r5)	# Store	Double Word
		ld	%r8, 8(%r4)	# Load Double Word
		std	%r8, 8(%r5)	# Store	Double Word
		ld	%r8, 0x10(%r4)	# Load Double Word
		std	%r8, 0x10(%r5)	# Store	Double Word
		ld	%r8, 0x18(%r4)	# Load Double Word
		std	%r8, 0x18(%r5)	# Store	Double Word
		dcbst	%r0, %r5	# Data Cache Block Store
		sync			# Synchronize
		icbi	%r0, %r5	# Instruction Cache Block Invalidate
		addi	%r4, %r4, 0x20	# Add Immediate
		addi	%r5, %r5, 0x20	# Add Immediate
		cmpld	%r5, %r6	# Compare Logical Double Word
		blt	loc_1048	# Branch if less than
		oris	%r4, %r3, 0x7F	# OR Immediate Shifted
		ori	%r4, %r4, -0xF8C # OR Immediate
		mtspr	CTR, %r4	# Move to sprg,
		bctr			# Branch unconditionally
# ---------------------------------------------------------------------------
		std	%r0, 0x10(%sp)	# Store	Double Word
		stdu	%sp, -0x80(%sp)	# Store	Double Word with Update
		std	%rtoc, 0x28(%sp) # Store Double	Word
		rldicr	%rtoc, %rtoc, 0,31 # Rotate Left Double	Word Immediate then Clear Right
		oris	%rtoc, %rtoc, 0x80 # OR	Immediate Shifted
		ori	%rtoc, %rtoc, 0x7C20 # OR Immediate
		bl	loc_15C0	# Branch
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		addi	%sp, %sp, 0x80	# Add Immediate
		ld	%r0, 0x10(%sp)	# Load Double Word
		mtspr	LR, %r0		# Move to sprg,
		li	%r3, 0		# Load Immediate
		blr			# Branch unconditionally
# ---------------------------------------------------------------------------
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
# ---------------------------------------------------------------------------
		mfspr	%r0, LR		# Move from sprg,
		std	%r0, 0x20(%sp)	# Store	Double Word
		std	%rtoc, 0x28(%sp) # Store Double	Word
		rldicr	%rtoc, %rtoc, 0,31 # Rotate Left Double	Word Immediate then Clear Right
		oris	%rtoc, %rtoc, 0x80 # OR	Immediate Shifted
		ori	%rtoc, %rtoc, 0x7C20 # OR Immediate
		bl	loc_17E0	# Branch
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		ld	%r0, 0x20(%sp)	# Load Double Word
		mtspr	LR, %r0		# Move to sprg,
		blr			# Branch unconditionally
# ---------------------------------------------------------------------------
		nop			# No Operation
		mfspr	%r0, LR		# Move from sprg,
		std	%r0, 0x20(%sp)	# Store	Double Word
		std	%rtoc, 0x28(%sp) # Store Double	Word
		rldicr	%rtoc, %rtoc, 0,31 # Rotate Left Double	Word Immediate then Clear Right
		oris	%rtoc, %rtoc, 0x80 # OR	Immediate Shifted
		ori	%rtoc, %rtoc, 0x7C20 # OR Immediate
		bl	loc_1934	# Branch
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		ld	%r0, 0x20(%sp)	# Load Double Word
		mtspr	LR, %r0		# Move to sprg,
		blr			# Branch unconditionally
# ---------------------------------------------------------------------------
		nop			# No Operation
		mfspr	%r0, LR		# Move from sprg,
		std	%r0, 0x20(%sp)	# Store	Double Word
		std	%rtoc, 0x28(%sp) # Store Double	Word
		rldicr	%rtoc, %rtoc, 0,31 # Rotate Left Double	Word Immediate then Clear Right
		oris	%rtoc, %rtoc, 0x80 # OR	Immediate Shifted
		ori	%rtoc, %rtoc, 0x7C20 # OR Immediate
		bl	loc_19AC	# Branch
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		ld	%r0, 0x20(%sp)	# Load Double Word
		mtspr	LR, %r0		# Move to sprg,
		blr			# Branch unconditionally
# ---------------------------------------------------------------------------
		nop			# No Operation
		mfspr	%r0, LR		# Move from sprg,
		std	%r0, 0x20(%sp)	# Store	Double Word
		std	%rtoc, 0x28(%sp) # Store Double	Word
		bl	loc_1180	# Branch

loc_1180:				# Load Immediate
		li	%r0, 0
		li	%rtoc, 0	# Load Immediate
		oris	%rtoc, %rtoc, 0x80 # OR	Immediate Shifted
		ori	%rtoc, %rtoc, 0x7C20 # OR Immediate
		oris	%r0, %r0, 0x7F	# OR Immediate Shifted
		ori	%r0, %r0, -0xEB0 # OR Immediate
		subf	%r0, %r0, %rtoc	# Subtract from
		mfspr	%rtoc, LR	# Move from sprg,
		addi	%rtoc, %rtoc, -0x10 # Add Immediate
		add	%rtoc, %rtoc, %r0 # Add
		bl	loc_1664	# Branch
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		nop			# No Operation
		nop			# No Operation
		ld	%r0, 0x20(%sp)	# Load Double Word
		mtspr	LR, %r0		# Move to sprg,
		blr			# Branch unconditionally

# =============== S U B	R O U T	I N E =======================================


sub_11C4:				# CODE XREF: seg004:0610 p seg004:0638 p ...
		addi	%r4, %r3, 4	# Add Immediate
		rldicr	%r3, %r3, 0,56	# Rotate Left Double Word Immediate then Clear Right

loc_11CC:				# CODE XREF: sub_11C4+24 j
		cmpld	%r3, %r4	# Compare Logical Double Word
		bge	locret_11EC	# Branch if greater than or equal
		dcbst	%r0, %r3	# Data Cache Block Store
		sync			# Synchronize
		icbi	%r0, %r3	# Instruction Cache Block Invalidate
		isync			# Instruction Synchronize
		addi	%r3, %r3, 0x80	# Add Immediate
		b	loc_11CC	# Branch
# ---------------------------------------------------------------------------

locret_11EC:				# CODE XREF: sub_11C4+C j
		blr			# Branch unconditionally
# End of function sub_11C4

# ---------------------------------------------------------------------------
		.byte 0x80000000000D22D8 # USBRegisterDriver
		.byte 0x800000000033E720
		.byte 0x80000000000D2998 # USBGetDeviceDescriptor
		.byte 0x800000000033E720
		.byte 0x80000000000D29C4 # USBOpenEndpoint
		.byte 0x800000000033E720
		.byte 0x80000000000D292C # USBControlTransfer
		.byte 0x800000000033E720
		.byte 0x8000000000011858 # ?kmalloc?
		.byte 0x800000000033E720
		.byte 0x8000000000011850 # send_event
		.byte 0x800000000033E720
		.byte 0x8000000000011D38 # ?spin_lock
		.byte 0x800000000033E720
		.byte 0x8000000000011B60 # vtab ctor
		.byte 0x800000000033E720
		.byte 0x800000000001192C # ?usb related?
		.byte 0x800000000033E720
		.byte 0x8000000000062088 # alloc
		.byte 0x800000000033E720
		.byte 0x80000000000624C8 # free
		.byte 0x800000000033E720

# =============== S U B	R O U T	I N E =======================================


sub_12A0:				# CODE XREF: seg004:0ACC p

.set var_30, -0x30
.set var_24, -0x24
.set var_10, -0x10
.set var_8, -8

		li	%r0, 0x10	# Load Immediate
		std	%r30, var_10(%sp) # Store Double Word
		addi	%r3, %r3, 0xF	# Add Immediate
		std	%r31, var_8(%sp) # Store Double	Word
		mtspr	CTR, %r0	# Move to sprg,
		li	%r0, 0		# Load Immediate
		li	%r10, 0xF	# Load Immediate
		addi	%r8, %sp, var_30 # Add Immediate
		stw	%r0, var_24(%sp) # Store Word

loc_12C4:				# CODE XREF: sub_12A0+54 j
		srawi	%r9, %r10, 2	# Shift	Right Algebraic	Word Immediate
		addze	%r9, %r9	# Add to Zero Extended
		extsw	%r9, %r9	# Extend Sign Word
		addi	%r0, %r10, -1	# Add Immediate
		lbz	%r11, 0(%r3)	# Load Byte and	Zero
		rldicr	%r9, %r9, 2,61	# Rotate Left Double Word Immediate then Clear Right
		extsw	%r10, %r0	# Extend Sign Word
		addi	%r3, %r3, -1	# Add Immediate
		lwzx	%r0, %r9, %r8	# Load Word and	Zero Indexed
		slwi	%r0, %r0, 8	# Shift	Left Immediate
		add	%r0, %r0, %r11	# Add
		stwx	%r0, %r9, %r8	# Store	Word Indexed
		bdnz	loc_12C4	# CTR--; branch	if CTR non-zero
		ld	%r9, -0x8000(%rtoc) # Load Double Word
		lis	%r0, -0x481F # 0xB7E15163 # Load Immediate Shifted
		li	%r11, 0x2B # '+' # Load Immediate
		ori	%r0, %r0, 0x5163 # 0xB7E15163 #	OR Immediate
		li	%r10, 0		# Load Immediate
		mtspr	CTR, %r11	# Move to sprg,
		ld	%r5, 0(%r9)	# Load Double Word
		stw	%r0, 0(%r5)	# Store	Word

loc_1318:				# CODE XREF: sub_12A0+90 j
		lwzx	%r9, %r10, %r5	# Load Word and	Zero Indexed
		add	%r11, %r5, %r10	# Add
		addi	%r10, %r10, 4	# Add Immediate
		addis	%r9, %r9, -0x61C9 # Add	Immediate Shifted
		addi	%r9, %r9, 0x79B9 # Add Immediate
		stw	%r9, 4(%r11)	# Store	Word
		bdnz	loc_1318	# CTR--; branch	if CTR non-zero
		li	%r0, 0x84 # '„' # Load Immediate
		li	%r7, 0		# Load Immediate
		li	%r12, 0		# Load Immediate
		mtspr	CTR, %r0	# Move to sprg,
		li	%r3, 0		# Load Immediate
		li	%r4, 0		# Load Immediate
		addi	%r31, %sp, var_30 # Add	Immediate
		li	%r30, 0x2C # ',' # Load Immediate

loc_1354:				# CODE XREF: sub_12A0+130 j
		addi	%r8, %r7, 1	# Add Immediate
		rldicr	%r7, %r7, 2,61	# Rotate Left Double Word Immediate then Clear Right
		add	%r11, %r4, %r3	# Add
		rldicr	%r6, %r12, 2,61	# Rotate Left Double Word Immediate then Clear Right
		addi	%r9, %r12, 1	# Add Immediate
		srawi	%r0, %r9, 2	# Shift	Right Algebraic	Word Immediate
		addze	%r0, %r0	# Add to Zero Extended
		slwi	%r0, %r0, 2	# Shift	Left Immediate
		lwzx	%r10, %r5, %r7	# Load Word and	Zero Indexed
		subf	%r9, %r0, %r9	# Subtract from
		add	%r11, %r11, %r10 # Add
		extsw	%r12, %r9	# Extend Sign Word
		rotlwi	%r11, %r11, 3	# Rotate Left Immediate
		divw	%r10, %r8, %r30	# Divide Word
		rldicl	%r3, %r11, 0,32	# Rotate Left Double Word Immediate then Clear Left
		mulli	%r10, %r10, 0x2C # Multiply Low	Immediate
		stwx	%r3, %r5, %r7	# Store	Word Indexed
		add	%r11, %r3, %r4	# Add
		lwzx	%r0, %r6, %r31	# Load Word and	Zero Indexed
		subf	%r8, %r10, %r8	# Subtract from
		clrlwi	%r11, %r11, 27	# Clear	Left Immediate
		add	%r0, %r0, %r4	# Add
		subfic	%r9, %r11, 0x20	# Subtract from	Immediate Carrying
		add	%r0, %r0, %r3	# Add
		extsw	%r7, %r8	# Extend Sign Word
		rldicl	%r0, %r0, 0,32	# Rotate Left Double Word Immediate then Clear Left
		srw	%r9, %r0, %r9	# Shift	Right Word
		slw	%r0, %r0, %r11	# Shift	Left Word
		or	%r0, %r0, %r9	# OR
		rldicl	%r4, %r0, 0,32	# Rotate Left Double Word Immediate then Clear Left
		stwx	%r4, %r6, %r31	# Store	Word Indexed
		bdnz	loc_1354	# CTR--; branch	if CTR non-zero
		ld	%r30, var_10(%sp) # Load Double	Word
		ld	%r31, var_8(%sp) # Load	Double Word
		blr			# Branch unconditionally
# End of function sub_12A0

# ---------------------------------------------------------------------------
		.byte 0x0000000000000000

		.byte	 0
		.byte	 2
		.byte	 0
		.byte	 0

# =============== S U B	R O U T	I N E =======================================


sub_13EC:				# CODE XREF: sub_14F4:loc_1524 p

.set var_8, -8

		ld	%r9, -0x8000(%rtoc) # Load Double Word
		li	%r0, 0x14	# Load Immediate
		lwz	%r10, 0(%r3)	# Load Word and	Zero
		mtspr	CTR, %r0	# Move to sprg,
		lwz	%r0, 8(%r3)	# Load Word and	Zero
		std	%r31, var_8(%sp) # Store Double	Word
		mr	%r31, %r4	# Move Register
		lwz	%r7, 4(%r3)	# Load Word and	Zero
		ld	%r12, 0(%r9)	# Load Double Word
		lwz	%r4, 0xC(%r3)	# Load Word and	Zero
		addi	%r3, %r12, 0xA0	# Add Immediate
		lwz	%r9, 0xAC(%r12)	# Load Word and	Zero
		lwz	%r11, 0xA8(%r12) # Load	Word and Zero
		subf	%r0, %r9, %r0	# Subtract from
		subf	%r10, %r11, %r10 # Subtract from
		rldicl	%r5, %r0, 0,32	# Rotate Left Double Word Immediate then Clear Left
		rldicl	%r6, %r10, 0,32	# Rotate Left Double Word Immediate then Clear Left

loc_1430:				# CODE XREF: sub_13EC+D0 j
		slwi	%r8, %r6, 1	# Shift	Left Immediate
		lwz	%r0, 4(%r3)	# Load Word and	Zero
		slwi	%r11, %r5, 1	# Shift	Left Immediate
		lwz	%r10, 0(%r3)	# Load Word and	Zero
		addi	%r8, %r8, 1	# Add Immediate
		addi	%r11, %r11, 1	# Add Immediate
		subf	%r0, %r0, %r7	# Subtract from
		mullw	%r11, %r11, %r5	# Multiply Low
		rldicl	%r0, %r0, 0,32	# Rotate Left Double Word Immediate then Clear Left
		rotlwi	%r11, %r11, 5	# Rotate Left Immediate
		subf	%r10, %r10, %r4	# Subtract from
		rldicl	%r11, %r11, 0,32 # Rotate Left Double Word Immediate then Clear	Left
		rldicl	%r10, %r10, 0,32 # Rotate Left Double Word Immediate then Clear	Left
		mr	%r4, %r5	# Move Register
		addi	%r3, %r3, -8	# Add Immediate
		mullw	%r8, %r8, %r6	# Multiply Low
		rotlwi	%r8, %r8, 5	# Rotate Left Immediate
		rldicl	%r8, %r8, 0,32	# Rotate Left Double Word Immediate then Clear Left
		clrlwi	%r9, %r8, 27	# Clear	Left Immediate
		subfic	%r7, %r9, 0x20	# Subtract from	Immediate Carrying
		srw	%r9, %r0, %r9	# Shift	Right Word
		slw	%r0, %r0, %r7	# Shift	Left Word
		mr	%r7, %r6	# Move Register
		or	%r9, %r9, %r0	# OR
		clrlwi	%r0, %r11, 27	# Clear	Left Immediate
		xor	%r9, %r9, %r11	# XOR
		subfic	%r11, %r0, 0x20	# Subtract from	Immediate Carrying
		srw	%r0, %r10, %r0	# Shift	Right Word
		slw	%r10, %r10, %r11 # Shift Left Word
		rldicl	%r11, %r9, 0,32	# Rotate Left Double Word Immediate then Clear Left
		or	%r0, %r0, %r10	# OR
		mr	%r5, %r11	# Move Register
		xor	%r0, %r0, %r8	# XOR
		rldicl	%r10, %r0, 0,32	# Rotate Left Double Word Immediate then Clear Left
		mr	%r6, %r10	# Move Register
		bdnz	loc_1430	# CTR--; branch	if CTR non-zero
		lwz	%r9, 0(%r12)	# Load Word and	Zero
		lwz	%r0, 4(%r12)	# Load Word and	Zero
		subf	%r9, %r9, %r7	# Subtract from
		stw	%r10, 0(%r31)	# Store	Word
		subf	%r0, %r0, %r4	# Subtract from
		stw	%r11, 8(%r31)	# Store	Word
		stw	%r9, 4(%r31)	# Store	Word
		stw	%r0, 0xC(%r31)	# Store	Word
		ld	%r31, var_8(%sp) # Load	Double Word
		blr			# Branch unconditionally
# End of function sub_13EC

# ---------------------------------------------------------------------------
		.byte 0x0000000000000000

		.byte	 0
		.byte	 1
		.byte	 0
		.byte	 0

# =============== S U B	R O U T	I N E =======================================


sub_14F4:				# CODE XREF: seg004:0B00 p

.set var_A0, -0xA0
.set arg_70,  0x70
.set arg_78,  0x78
.set arg_80,  0x80
.set arg_88,  0x88
.set arg_90,  0x90
.set arg_98,  0x98
.set arg_B0,  0xB0

		stdu	%sp, var_A0(%sp) # Store Double	Word with Update
		mfspr	%r0, LR		# Move from sprg,
		std	%r28, arg_80(%sp) # Store Double Word
		mr	%r28, %r4	# Move Register
		std	%r29, arg_88(%sp) # Store Double Word
		mr	%r29, %r3	# Move Register
		std	%r30, arg_90(%sp) # Store Double Word
		addi	%r30, %r3, 8	# Add Immediate
		std	%r31, arg_98(%sp) # Store Double Word
		mr	%r31, %r3	# Move Register
		std	%r0, arg_B0(%sp) # Store Double	Word
		b	loc_156C	# Branch
# ---------------------------------------------------------------------------

loc_1524:				# CODE XREF: sub_14F4+88 j
		bl	sub_13EC	# Branch
		ld	%r10, -0x7FF8(%rtoc) # Load Double Word
		ld	%r0, 0(%r31)	# Load Double Word
		ld	%r9, 0(%r10)	# Load Double Word
		std	%r0, 0(%r10)	# Store	Double Word
		ld	%r0, arg_70(%sp) # Load	Double Word
		ld	%r11, 8(%r10)	# Load Double Word
		xor	%r0, %r0, %r9	# XOR
		ld	%r9, arg_78(%sp) # Load	Double Word
		xor	%r9, %r9, %r11	# XOR
		ld	%r11, 0(%r30)	# Load Double Word
		std	%r0, arg_70(%sp) # Store Double	Word
		std	%r11, 8(%r10)	# Store	Double Word
		std	%r0, 0(%r31)	# Store	Double Word
		addi	%r31, %r31, 0x10 # Add Immediate
		std	%r9, 0(%r30)	# Store	Double Word
		addi	%r30, %r30, 0x10 # Add Immediate
		std	%r9, arg_78(%sp) # Store Double	Word

loc_156C:				# CODE XREF: sub_14F4+2C j
		subf	%r0, %r29, %r31	# Subtract from
		mr	%r3, %r31	# Move Register
		cmpw	cr7, %r0, %r28	# Compare Word
		addi	%r4, %sp, arg_70 # Add Immediate
		blt	cr7, loc_1524	# Branch if less than
		ld	%r0, arg_B0(%sp) # Load	Double Word
		ld	%r28, arg_80(%sp) # Load Double	Word
		ld	%r29, arg_88(%sp) # Load Double	Word
		mtspr	LR, %r0		# Move to sprg,
		ld	%r30, arg_90(%sp) # Load Double	Word
		ld	%r31, arg_98(%sp) # Load Double	Word
		addi	%sp, %sp, 0xA0	# Add Immediate
		blr			# Branch unconditionally
# End of function sub_14F4

# ---------------------------------------------------------------------------
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 1

		.byte 0x80 # €
		.byte	 4
		.byte	 0
		.byte	 0
		.byte 0x38 # 8
		.byte 0x60 # `
		.byte	 0
		.byte	 0
		.byte 0x4E # N
		.byte 0x80 # €
		.byte	 0
		.byte 0x20
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
# ---------------------------------------------------------------------------

loc_15C0:				# CODE XREF: seg004:00AC p
		stdu	%sp, -0x90(%sp)	# Store	Double Word with Update
		mfspr	%r0, LR		# Move from sprg,
		std	%r28, 0x70(%sp)	# Store	Double Word
		li	%r4, 8		# Load Immediate
		ld	%r28, -0x7FF0(%rtoc) # Load Double Word
		std	%r0, 0xA0(%sp)	# Store	Double Word
		ld	%r9, -0x7FE0(%rtoc) # Load Double Word
		std	%r29, 0x78(%sp)	# Store	Double Word
		ld	%r29, -0x7FE8(%rtoc) # Load Double Word
		ld	%r10, 0(%r28)	# Load Double Word
		addi	%r11, %r10, 0x40 # Add Immediate
		subf	%r9, %r11, %r9	# Subtract from
		lwz	%r0, 0(%r29)	# Load Word and	Zero
		mr	%r3, %r11	# Move Register
		addi	%r9, %r9, -4	# Add Immediate
		stw	%r0, 0x40(%r10)	# Store	Word
		rlwinm	%r9, %r9, 0,6,29 # Rotate Left Word Immediate then AND with Mask
		oris	%r9, %r9, 0x4800 # OR Immediate	Shifted
		ori	%r9, %r9, 1	# OR Immediate
		stw	%r9, 4(%r11)	# Store	Word
		bl	sub_11C4	# Branch
		nop			# No Operation
		ld	%r0, 0(%r28)	# Load Double Word
		ld	%r9, -0x7FD8(%rtoc) # Load Double Word
		mr	%r3, %r29	# Move Register
		li	%r4, 4		# Load Immediate
		add	%r0, %r0, %r9	# Add
		rlwinm	%r0, %r0, 0,6,29 # Rotate Left Word Immediate then AND with Mask
		oris	%r0, %r0, 0x4800 # OR Immediate	Shifted
		stw	%r0, 0(%r29)	# Store	Word
		bl	sub_11C4	# Branch
		nop			# No Operation
		ld	%r0, 0xA0(%sp)	# Load Double Word
		ld	%r28, 0x70(%sp)	# Load Double Word
		ld	%r29, 0x78(%sp)	# Load Double Word
		mtspr	LR, %r0		# Move to sprg,
		addi	%sp, %sp, 0x90	# Add Immediate
		blr			# Branch unconditionally
# ---------------------------------------------------------------------------
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 1
# ---------------------------------------------------------------------------
		lwz	%r0, 0(%r4)	# Load Word and	Zero

loc_1664:				# CODE XREF: seg004:01A8 p
		ld	%r9, -0x7FC8(%rtoc) # Load Double Word
		mfspr	%r0, LR		# Move from sprg,
		stdu	%sp, -0xC0(%sp)	# Store	Double Word with Update
		std	%r28, 0xA0(%sp)	# Store	Double Word
		li	%r4, 1		# Load Immediate
		std	%r29, 0xA8(%sp)	# Store	Double Word
		std	%r0, 0xD0(%sp)	# Store	Double Word
		std	%rtoc, 0x28(%sp) # Store Double	Word
		ld	%r28, -0x7FD0(%rtoc) # Load Double Word
		ld	%r0, 0(%r9)	# Load Double Word
		ld	%r11, 0x10(%r9)	# Load Double Word
		mr	%r3, %r28	# Move Register
		mtspr	CTR, %r0	# Move to sprg,
		ld	%rtoc, 8(%r9)	# Load Double Word
		bctrl			# Branch unconditionally
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		li	%r6, 1		# Load Immediate
		ld	%r9, -0x7FB8(%rtoc) # Load Double Word
		li	%r5, 1		# Load Immediate
		ld	%r29, -0x7FC0(%rtoc) # Load Double Word
		li	%r4, 2		# Load Immediate
		mr	%r3, %r29	# Move Register
		ld	%r0, 0(%r9)	# Load Double Word
		ld	%r11, 0x10(%r9)	# Load Double Word
		mtspr	CTR, %r0	# Move to sprg,
		ld	%rtoc, 8(%r9)	# Load Double Word
		bctrl			# Branch unconditionally
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		ld	%r4, 0(%r29)	# Load Double Word
		ld	%r9, -0x7FB0(%rtoc) # Load Double Word
		ld	%r3, 0(%r28)	# Load Double Word
		ld	%r0, 0(%r9)	# Load Double Word
		ld	%r11, 0x10(%r9)	# Load Double Word
		mtspr	CTR, %r0	# Move to sprg,
		ld	%rtoc, 8(%r9)	# Load Double Word
		bctrl			# Branch unconditionally
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		ld	%r9, -0x7FA0(%rtoc) # Load Double Word
		ld	%r3, -0x7FA8(%rtoc) # Load Double Word
		ld	%r0, 0(%r9)	# Load Double Word
		ld	%r11, 0x10(%r9)	# Load Double Word
		mtspr	CTR, %r0	# Move to sprg,
		ld	%rtoc, 8(%r9)	# Load Double Word
		bctrl			# Branch unconditionally
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		li	%r5, 0		# Load Immediate
		ld	%r9, -0x7F98(%rtoc) # Load Double Word
		addi	%r4, %sp, 0x80	# Add Immediate
		ld	%r3, 0(%r29)	# Load Double Word
		ld	%r0, 0(%r9)	# Load Double Word
		ld	%r11, 0x10(%r9)	# Load Double Word
		mtspr	CTR, %r0	# Move to sprg,
		ld	%rtoc, 8(%r9)	# Load Double Word
		bctrl			# Branch unconditionally
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		lis	%r0, -0x7DF # 0xF821FF11 # Load	Immediate Shifted
		ld	%r9, -0x7FE8(%rtoc) # Load Double Word
		li	%r4, 4		# Load Immediate
		ori	%r0, %r0, -0xEF	# 0xF821FF11 # OR Immediate
		mr	%r3, %r9	# Move Register
		stw	%r0, 0(%r9)	# Store	Word
		bl	sub_11C4	# Branch
		nop			# No Operation
		ld	%r29, -0x7F90(%rtoc) # Load Double Word
		ld	%r9, -0x7F88(%rtoc) # Load Double Word
		ld	%r3, 0(%r29)	# Load Double Word
		lwz	%r4, 0(%r9)	# Load Word and	Zero
		bl	sub_11C4	# Branch
		nop			# No Operation
		ld	%r0, 0(%r29)	# Load Double Word
		ld	%r11, 0x80(%sp)	# Load Double Word
		std	%rtoc, 0x28(%sp) # Store Double	Word
		mtspr	CTR, %r0	# Move to sprg,
		std	%r0, 0x70(%sp)	# Store	Double Word
		ld	%rtoc, 0x78(%sp) # Load	Double Word
		bctrl			# Branch unconditionally
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		ld	%r3, 0(%r29)	# Load Double Word
		ld	%r9, -0x7F80(%rtoc) # Load Double Word
		li	%r4, 0x27 # ''' # Load Immediate
		ld	%r0, 0(%r9)	# Load Double Word
		ld	%r11, 0x10(%r9)	# Load Double Word
		mtspr	CTR, %r0	# Move to sprg,
		ld	%rtoc, 8(%r9)	# Load Double Word
		bctrl			# Branch unconditionally
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		ld	%r0, 0xD0(%sp)	# Load Double Word
		ld	%r28, 0xA0(%sp)	# Load Double Word
		ld	%r29, 0xA8(%sp)	# Load Double Word
		mtspr	LR, %r0		# Move to sprg,
		addi	%sp, %sp, 0xC0	# Add Immediate
		blr			# Branch unconditionally
# ---------------------------------------------------------------------------
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 1
# ---------------------------------------------------------------------------
		lwz	%r0, 0(%r4)	# Load Word and	Zero

loc_17E0:				# CODE XREF: seg004:00F8 p
		ld	%r10, -0x7F60(%rtoc) # Load Double Word
		mfspr	%r0, LR		# Move from sprg,
		ld	%r11, -0x7F70(%rtoc) # Load Double Word
		li	%r5, 0		# Load Immediate
		ld	%r8, -0x7F68(%rtoc) # Load Double Word
		li	%r6, 0		# Load Immediate
		ld	%r9, -0x7F78(%rtoc) # Load Double Word
		stdu	%sp, -0x70(%sp)	# Store	Double Word with Update
		std	%r0, 0x80(%sp)	# Store	Double Word
		stw	%r3, 0(%r9)	# Store	Word
		stw	%r4, 0(%r11)	# Store	Word
		li	%r4, 0		# Load Immediate
		std	%rtoc, 0x28(%sp) # Store Double	Word
		ld	%r0, 0(%r10)	# Load Double Word
		ld	%r3, 0(%r8)	# Load Double Word
		mtspr	CTR, %r0	# Move to sprg,
		ld	%r11, 0x10(%r10) # Load	Double Word
		ld	%rtoc, 8(%r10)	# Load Double Word
		bctrl			# Branch unconditionally
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		ld	%r0, 0x80(%sp)	# Load Double Word
		addi	%sp, %sp, 0x70	# Add Immediate
		mtspr	LR, %r0		# Move to sprg,
		blr			# Branch unconditionally
# ---------------------------------------------------------------------------
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 1
# ---------------------------------------------------------------------------
		lwz	%r0, unk_1000	# Load Word and	Zero

# =============== S U B	R O U T	I N E =======================================


sub_184C:				# CODE XREF: seg004:0A84 p seg004:0AF4 p

.set var_B0, -0xB0
.set arg_28,  0x28
.set arg_70,  0x70
.set arg_72,  0x72
.set arg_74,  0x74
.set arg_76,  0x76
.set arg_78,  0x78
.set arg_A0,  0xA0
.set arg_A8,  0xA8
.set arg_C0,  0xC0

		ld	%r9, -0x7F48(%rtoc) # Load Double Word
		mfspr	%r0, LR		# Move from sprg,
		stdu	%sp, var_B0(%sp) # Store Double	Word with Update
		std	%r0, arg_C0(%sp) # Store Double	Word
		srwi	%r0, %r5, 16	# Shift	Right Immediate
		ld	%r10, -0x7F58(%rtoc) # Load Double Word
		std	%r30, arg_A0(%sp) # Store Double Word
		mr	%r30, %r7	# Move Register
		std	%r31, arg_A8(%sp) # Store Double Word
		stb	%r3, arg_70(%sp) # Store Byte
		stb	%r4, arg_70+1(%sp) # Store Byte
		addi	%r4, %sp, arg_70 # Add Immediate
		std	%rtoc, arg_28(%sp) # Store Double Word
		sth	%r5, arg_74(%sp) # Store Half Word
		mr	%r5, %r6	# Move Register
		sth	%r0, arg_72(%sp) # Store Half Word
		ld	%r11, 0x10(%r9)	# Load Double Word
		sth	%r7, arg_76(%sp) # Store Half Word
		li	%r7, 0		# Load Immediate
		ld	%r0, 0(%r9)	# Load Double Word
		ld	%r6, -0x7F50(%rtoc) # Load Double Word
		lwa	%r3, 0(%r10)	# Load Word Algebraic
		mtspr	CTR, %r0	# Move to sprg,
		ld	%rtoc, 8(%r9)	# Load Double Word
		bctrl			# Branch unconditionally
		ld	%rtoc, arg_28(%sp) # Load Double Word
		addi	%r4, %sp, arg_78 # Add Immediate
		mr.	%r31, %r3	# Move Register
		li	%r5, 0		# Load Immediate
		bne	loc_190C	# Branch if not	equal
		ld	%r9, -0x7F98(%rtoc) # Load Double Word
		ld	%r10, -0x7F40(%rtoc) # Load Double Word
		ld	%r0, 0(%r9)	# Load Double Word
		ld	%r11, 0x10(%r9)	# Load Double Word
		mtspr	CTR, %r0	# Move to sprg,
		ld	%rtoc, 8(%r9)	# Load Double Word
		ld	%r3, 0(%r10)	# Load Double Word
		bctrl			# Branch unconditionally
		ld	%rtoc, arg_28(%sp) # Load Double Word
		ld	%r9, -0x7F78(%rtoc) # Load Double Word
		lwz	%r0, 0(%r9)	# Load Word and	Zero
		cmpwi	cr7, %r0, 0	# Compare Word Immediate
		bne	cr7, loc_1908	# Branch if not	equal
		ld	%r9, -0x7F70(%rtoc) # Load Double Word
		lwz	%r0, 0(%r9)	# Load Word and	Zero
		cmpw	cr7, %r0, %r30	# Compare Word
		beq	cr7, loc_190C	# Branch if equal

loc_1908:				# CODE XREF: sub_184C+A8 j
		li	%r31, -1	# Load Immediate

loc_190C:				# CODE XREF: sub_184C+74 j sub_184C+B8 j
		ld	%r0, arg_C0(%sp) # Load	Double Word
		mr	%r3, %r31	# Move Register
		ld	%r30, arg_A0(%sp) # Load Double	Word
		ld	%r31, arg_A8(%sp) # Load Double	Word
		mtspr	LR, %r0		# Move to sprg,
		addi	%sp, %sp, 0xB0	# Add Immediate
		blr			# Branch unconditionally
# End of function sub_184C

# ---------------------------------------------------------------------------
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 1
# ---------------------------------------------------------------------------
		lwz	%r0, 0(%rtoc)	# Load Word and	Zero

loc_1934:				# CODE XREF: seg004:0128 p
		ld	%r9, -0x7F38(%rtoc) # Load Double Word
		mfspr	%r0, LR		# Move from sprg,
		stdu	%sp, -0x70(%sp)	# Store	Double Word with Update
		std	%r0, 0x80(%sp)	# Store	Double Word
		li	%r4, 0		# Load Immediate
		std	%rtoc, 0x28(%sp) # Store Double	Word
		li	%r5, 1		# Load Immediate
		ld	%r0, 0(%r9)	# Load Double Word
		ld	%r11, 0x10(%r9)	# Load Double Word
		mtspr	CTR, %r0	# Move to sprg,
		ld	%rtoc, 8(%r9)	# Load Double Word
		bctrl			# Branch unconditionally
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		lis	%r0, -0x5556 # 0xAAAABAC0 # Load Immediate Shifted
		lwz	%r9, 8(%r3)	# Load Word and	Zero
		ori	%r0, %r0, -0x4540 # 0xAAAABAC0 # OR Immediate
		xor	%r9, %r9, %r0	# XOR
		srawi	%r0, %r9, 0x1F	# Shift	Right Algebraic	Word Immediate
		xor	%r3, %r0, %r9	# XOR
		subf	%r3, %r3, %r0	# Subtract from
		ld	%r0, 0x80(%sp)	# Load Double Word
		addi	%sp, %sp, 0x70	# Add Immediate
		srwi	%r3, %r3, 31	# Shift	Right Immediate
		mtspr	LR, %r0		# Move to sprg,
		extsw	%r3, %r3	# Extend Sign Word
		neg	%r3, %r3	# Negate
		blr			# Branch unconditionally
# ---------------------------------------------------------------------------
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 0
		.byte	 1
# ---------------------------------------------------------------------------
		lwz	%r0, unk_1000	# Load Word and	Zero

loc_19AC:				# CODE XREF: seg004:0158 p
		ld	%r9, -0x7F30(%rtoc) # Load Double Word
		mfspr	%r0, LR		# Move from sprg,
		stdu	%sp, -0xA0(%sp)	# Store	Double Word with Update
		std	%r28, 0x80(%sp)	# Store	Double Word
		li	%r4, 0		# Load Immediate
		std	%r29, 0x88(%sp)	# Store	Double Word
		std	%r30, 0x90(%sp)	# Store	Double Word
		std	%r31, 0x98(%sp)	# Store	Double Word
		std	%r0, 0xB0(%sp)	# Store	Double Word
		std	%rtoc, 0x28(%sp) # Store Double	Word
		ld	%r0, 0(%r9)	# Load Double Word
		ld	%r11, 0x10(%r9)	# Load Double Word
		mtspr	CTR, %r0	# Move to sprg,
		ld	%rtoc, 8(%r9)	# Load Double Word
		bctrl			# Branch unconditionally
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		li	%r4, 1		# Load Immediate
		ld	%r10, -0x7FC8(%rtoc) # Load Double Word
		ld	%r9, -0x7F58(%rtoc) # Load Double Word
		ld	%r28, -0x7F68(%rtoc) # Load Double Word
		stw	%r3, 0(%r9)	# Store	Word
		mr	%r3, %r28	# Move Register
		ld	%r0, 0(%r10)	# Load Double Word
		ld	%r11, 0x10(%r10) # Load	Double Word
		ld	%rtoc, 8(%r10)	# Load Double Word
		mtspr	CTR, %r0	# Move to sprg,
		bctrl			# Branch unconditionally
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		li	%r5, 1		# Load Immediate
		ld	%r9, -0x7FB8(%rtoc) # Load Double Word
		li	%r6, 1		# Load Immediate
		ld	%r29, -0x7F40(%rtoc) # Load Double Word
		li	%r4, 2		# Load Immediate
		mr	%r3, %r29	# Move Register
		ld	%r0, 0(%r9)	# Load Double Word
		ld	%r11, 0x10(%r9)	# Load Double Word
		mtspr	CTR, %r0	# Move to sprg,
		ld	%rtoc, 8(%r9)	# Load Double Word
		bctrl			# Branch unconditionally
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		ld	%r4, 0(%r29)	# Load Double Word
		ld	%r9, -0x7FB0(%rtoc) # Load Double Word
		ld	%r3, 0(%r28)	# Load Double Word
		ld	%r0, 0(%r9)	# Load Double Word
		ld	%r11, 0x10(%r9)	# Load Double Word
		mtspr	CTR, %r0	# Move to sprg,
		ld	%rtoc, 8(%r9)	# Load Double Word
		bctrl			# Branch unconditionally
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		lis	%r5, 0x10	# Load Immediate Shifted
		addi	%r6, %sp, 0x70	# Add Immediate
		li	%r7, 8		# Load Immediate
		li	%r4, 0x11	# Load Immediate
		li	%r3, 0xC0 # '� # Load Immediate
		bl	sub_184C	# Branch
		ld	%r10, -0x7F28(%rtoc) # Load Double Word
		ld	%r9, -0x7F88(%rtoc) # Load Double Word
		li	%r4, 0x27 # ''' # Load Immediate
		lwz	%r3, 0x74(%sp)	# Load Word and	Zero
		std	%rtoc, 0x28(%sp) # Store Double	Word
		stw	%r3, 0(%r9)	# Store	Word
		extsw	%r3, %r3	# Extend Sign Word
		ld	%r0, 0(%r10)	# Load Double Word
		ld	%r11, 0x10(%r10) # Load	Double Word
		mtspr	CTR, %r0	# Move to sprg,
		ld	%rtoc, 8(%r10)	# Load Double Word
		bctrl			# Branch unconditionally
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		mr	%r30, %r3	# Move Register
		ld	%r9, -0x7F90(%rtoc) # Load Double Word
		ld	%r3, -0x7F20(%rtoc) # Load Double Word
		std	%r30, 0(%r9)	# Store	Double Word
		bl	sub_12A0	# Branch
		li	%r5, 0		# Load Immediate
		b	loc_1B08	# Branch
# ---------------------------------------------------------------------------

loc_1AD8:				# CODE XREF: seg004:0B34 j
		lwz	%r0, 0x70(%sp)	# Load Word and	Zero
		li	%r29, 0x1000	# Load Immediate
		add	%r0, %r0, %r5	# Add
		ble	cr6, loc_1AEC	# Branch if less than or equal
		rldicl	%r29, %r9, 0,32	# Rotate Left Double Word Immediate then Clear Left

loc_1AEC:				# CODE XREF: seg004:0AE4 j
		rldicl	%r5, %r0, 0,32	# Rotate Left Double Word Immediate then Clear Left
		rldicl	%r7, %r29, 0,48	# Rotate Left Double Word Immediate then Clear Left
		bl	sub_184C	# Branch
		mr	%r3, %r31	# Move Register
		extsw	%r4, %r29	# Extend Sign Word
		bl	sub_14F4	# Branch
		mr	%r5, %r28	# Move Register

loc_1B08:				# CODE XREF: seg004:0AD4 j
		ld	%r11, -0x7F88(%rtoc) # Load Double Word
		addi	%r9, %r5, 0x1000 # Add Immediate
		add	%r31, %r30, %r5	# Add
		rldicl	%r28, %r9, 0,32	# Rotate Left Double Word Immediate then Clear Left
		li	%r4, 0x11	# Load Immediate
		mr	%r6, %r31	# Move Register
		lwz	%r0, 0(%r11)	# Load Word and	Zero
		li	%r3, 0xC0 # '� # Load Immediate
		cmplw	cr7, %r5, %r0	# Compare Logical Word
		cmplw	cr6, %r28, %r0	# Compare Logical Word
		subf	%r9, %r5, %r0	# Subtract from
		blt	cr7, loc_1AD8	# Branch if less than
		ld	%r9, -0x7F60(%rtoc) # Load Double Word
		li	%r4, 0		# Load Immediate
		ld	%r10, -0x7FD0(%rtoc) # Load Double Word
		li	%r5, 0		# Load Immediate
		std	%rtoc, 0x28(%sp) # Store Double	Word
		li	%r6, 0		# Load Immediate
		ld	%r0, 0(%r9)	# Load Double Word
		ld	%r11, 0x10(%r9)	# Load Double Word
		mtspr	CTR, %r0	# Move to sprg,
		ld	%r3, 0(%r10)	# Load Double Word
		ld	%rtoc, 8(%r9)	# Load Double Word
		bctrl			# Branch unconditionally
		ld	%rtoc, 0x28(%sp) # Load	Double Word
		ld	%r0, 0xB0(%sp)	# Load Double Word
		li	%r3, 0		# Load Immediate
		ld	%r28, 0x80(%sp)	# Load Double Word
		ld	%r29, 0x88(%sp)	# Load Double Word
		mtspr	LR, %r0		# Move to sprg,
		ld	%r30, 0x90(%sp)	# Load Double Word
		ld	%r31, 0x98(%sp)	# Load Double Word
		addi	%sp, %sp, 0xA0	# Add Immediate
		blr			# Branch unconditionally
# ---------------------------------------------------------------------------
		.byte 0x0000000000000001
		.byte 0x8004000000000000
		.byte 0x0000000000000000

		.byte 0x80000000007FE000
		.byte 0x80000000007FFB80
		.byte 0x80000000007FFD18
		.byte 0x80000000007FFD28
		.byte 0x80000000007FFD90

		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000

		.byte 0x80000000007FFB88
		.byte 0x80000000007FFBB0
		.byte 0x80000000007FFD38
		.byte 0x8000000000287C28
		.byte 0x8000000000287C2C
		.byte 0x7FFFFFFFFFD783D8
		.byte 0x80000000007FFBD0
		.byte 0x80000000007FF210
		.byte 0x80000000007FFBE0
		.byte 0x80000000007FF240
		.byte 0x80000000007FF230
		.byte 0x80000000007FFB90
		.byte 0x80000000007FF1D0
		.byte 0x80000000007FFBF8
		.byte 0x80000000007FFBF0
		.byte 0x80000000007FF270
		.byte 0x80000000007FFBE8
		.byte 0x80000000007FFBEC
		.byte 0x80000000007FFBC8
		.byte 0x80000000007FF220
		.byte 0x80000000007FFBC0
		.byte 0x80000000007FFD08
		.byte 0x80000000007FF200
		.byte 0x80000000007FFBD8
		.byte 0x80000000007FF1E0
		.byte 0x80000000007FF1F0
		.byte 0x80000000007FF260
		.byte 0x8000000000359B05
		.byte 0x80000000007FF0C0
		.byte 0x8000000000807C20
		.byte 0x80000000007FF0F0
		.byte 0x8000000000807C20
		.byte 0x80000000007FF120
		.byte 0x8000000000807C20
		.byte 0x80000000007FF150
		.byte 0x8000000000807C20

		.byte 0x80000000007FF280
		.byte 0x8000000000807C20

		.byte 0x0000000000000000

		.byte 0x80000000007FF3CC
		.byte 0x8000000000807C20

		.byte 0x0000000000000000

		.byte 0x80000000007FF4D4
		.byte 0x8000000000807C20

		.byte 0x0000000000000000

		.byte 0x80000000007FF58C
		.byte 0x8000000000807C20

		.byte 0x0000000000000000

		.byte 0x80000000007FF5A0
		.byte 0x8000000000807C20

		.byte 0x0000000000000000

		.byte 0x80000000007FF644
		.byte 0x8000000000807C20

		.byte 0x0000000000000000

		.byte 0x80000000007FF7C0
		.byte 0x8000000000807C20

		.byte 0x0000000000000000

		.byte 0x80000000007FF82C 
		.byte 0x8000000000807C20

		.byte 0x0000000000000000

		.byte 0x80000000007FF914 
		.byte 0x8000000000807C20

		.byte 0x0000000000000000

		.byte 0x80000000007FF98C 
		.byte 0x8000000000807C20



		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000
		.byte 0x0000000000000000






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Comments 547 Comments - Go to Forum Thread »

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d3adliner's Avatar
#547 - d3adliner - 6d ago
Reply
Tried your suggestion but it only changed the background for every other mode except for the one I want changed, lol.

I tried adding game_bg_overlay=0 to the config.bin file but that didn't work either. There used to be a view mode called "Game list (user background)" but it's gone now.

What I'm trying to do is to get something like this working again since Deank removed that view mode. I find it odd how you can change the background for every view but that one now.

Azrial's Avatar
#546 - Azrial - 6d ago
Reply
I think you go to your images via the MultiMAN XMB view, and select what image you want to use as a wallpaper.

d3adliner's Avatar
#545 - d3adliner - 6d ago
Reply
Is there any way to change the game backgrounds in this view (see attached picture) to a be the same single static image for every game? I remember this was an option on earlier versions of Multiman but I don't see the option in the options.ini or options.bin. There is a setting to disable them in the XMB modes, but I don't see a setting for the game list view.

The reason I want this is because there is something wrong with that specific view, that makes the image not change to the selected game if you move through your list too fast.

dekaspace's Avatar
#544 - dekaspace - 1w ago
Reply
Long winded but I have loads of games on my OFW console so data transferred them to new one but need to then backup them to pc since there is about 50 gig of stuff so I can put the hard drive from my old console into my new CFW console, ftp back the games then put the 60 gig hd in my OFW console and data transfer the same games so I have the games on both consoles.

How exactly do I copy games with multiman in such a way that the XMB still shows them as installed?

2tailedfox's Avatar
#543 - 2tailedfox - 2w ago
Reply
lol, thanks, that answers that part, but still don't know why I installed 4.40.00 and it still says 4.06.02. Every time I want to play a game it asks me to update and i have to say no because it puts on psmove stuff that breaks it with a 3d exclamation mark. I figured the old mmcm update server would have the right update.

So which version do I actually have, and where can I manually get non-psmove update files? so what version am i on? 4.4 or 4.06?

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